diff options
author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 15:19:32 -0600 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:26 +0000 |
commit | 976200388b6924c7b30c6062b64a8db7e215f37f (patch) | |
tree | 659eca8c9acac2ffb13492086acca2b60ec099a7 /src/southbridge/intel/bd82x6x/Makefile.inc | |
parent | cfe7ad1e8f7ed6f3d72db2041bf2051ac88e2a5f (diff) |
southbridge/intel/bd82x6x: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to early_pch_common.c and
add a helper function to determine if failure occurred.
BUG=b:63054105
Change-Id: I710d99551cfb6455244f66b47fcbecc790ae770f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Makefile.inc')
-rw-r--r-- | src/southbridge/intel/bd82x6x/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index a570640f2e..8e882681ce 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -52,6 +52,6 @@ else romstage-y += early_me_mrc.c early_usb_mrc.c endif -ramstage-y += madt.c +ramstage-y += madt.c early_pch_common.c endif |