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authorVladimir Serbinenko <phcoder@gmail.com>2016-02-10 02:36:04 +0100
committerMartin Roth <martinroth@google.com>2016-02-12 17:09:05 +0100
commit144eea069726903d157f67a2f886dff4575d9b19 (patch)
tree995376822269c860e71fbae390a970fab3d587a7 /src/southbridge/intel/bd82x6x/Makefile.inc
parentc37c7c8b1f3977e362e05945a48ddecf803e20a7 (diff)
Make MRC vs native a config rather than making a separate chipset for it.
Tested by making lenovo x230 configurable despite pretty MRC bugs. Change-Id: Ia2a123f24334f5cd5f42473b7ce7f3d77c0e65b7 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: https://review.coreboot.org/13658 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Makefile.inc')
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index a8dd7be4cc..c85151c5aa 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -46,10 +46,11 @@ romstage-y += reset.c
romstage-y += early_spi.c early_pch_common.c
romstage-y += early_rcba.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_MRC) += early_me_mrc.c early_usb_mrc.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC) += early_me_mrc.c early_usb_mrc.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += early_thermal.c early_pch.c early_me.c early_usb.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += early_thermal.c early_pch.c early_me.c early_usb.c
+ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
+romstage-y += early_thermal.c early_pch.c early_me.c early_usb.c
+else
+romstage-y += early_me_mrc.c early_usb_mrc.c
+endif
ramstage-y += madt.c