diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2012-05-10 11:27:32 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-05-10 23:52:44 +0200 |
| commit | 1c56d9b1029b344b92bc1cd1acb2fe52ce0c0e2d (patch) | |
| tree | 81db0d753447c2e0f8fd196ef9ba74b142baeb64 /src/southbridge/intel/bd82x6x/Kconfig | |
| parent | 43105d6a5a4898386e35c4fdccdf643b95faef98 (diff) | |
Add SPI flash driver
This driver is taken from u-boot and adapted to match
coreboot. It still contains some hacks and is ICH specific
at places.
Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/997
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Kconfig')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 3891be13b0..33dfe9d755 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -33,6 +33,8 @@ config SOUTH_BRIDGE_OPTIONS # dummy select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK + select SPI_FLASH + select SPI_FLASH_NO_FAST_READ config EHCI_BAR hex |