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authorDuncan Laurie <dlaurie@chromium.org>2013-12-03 10:00:20 -0800
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-08 07:05:42 +0200
commitbb0d1ea24736b96789c10823b1a194818943cc3c (patch)
tree076e5957d8cccbcf088436983b093f8cb5804fc1 /src/southbridge/broadcom/bcm5785/sata.c
parent22f1dcdfc4f7e990e65a72ff9f34d74754208df6 (diff)
baytrail: Add ACPI code to describe GPIO controller
There are 3 banks of GPIOs that need to be described with specific _UID and memory/interrupt values. BUG=chrome-os-partner:24314 BRANCH=none TEST=build and boot on rambi, check for probed driver: gpiochip_find_base: found new base at 154 gpiochip_add: registered GPIOs 154 to 255 on device: INT33FC:00 gpiochip_find_base: found new base at 126 gpiochip_add: registered GPIOs 126 to 153 on device: INT33FC:01 gpiochip_find_base: found new base at 82 gpiochip_add: registered GPIOs 82 to 125 on device: INT33FC:02 fed0c000-fed0cfff : INT33FC:00 fed0c000-fed0cfff : INT33FC:00 fed0d000-fed0dfff : INT33FC:01 fed0d000-fed0dfff : INT33FC:01 fed0e000-fed0efff : INT33FC:02 fed0e000-fed0efff : INT33FC:02 Change-Id: I9619e2af4e1ccdf3d7b2e4ae280aadf22e278aeb Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/178601 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4985 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/broadcom/bcm5785/sata.c')
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