diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-31 19:22:16 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:22:46 +0200 |
| commit | ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch) | |
| tree | 9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/broadcom/bcm5785/reset.c | |
| parent | 2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff) | |
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/broadcom/bcm5785/reset.c')
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/reset.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/broadcom/bcm5785/reset.c b/src/southbridge/broadcom/bcm5785/reset.c index 7064b19e65..8140e014c2 100644 --- a/src/southbridge/broadcom/bcm5785/reset.c +++ b/src/southbridge/broadcom/bcm5785/reset.c @@ -18,24 +18,24 @@ #include <reset.h> #define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x7) << 12)) + (((BUS) & 0xFFF) << 20) | \ + (((DEV) & 0x1F) << 15) | \ + (((FN) & 0x7) << 12)) static void pci_write_config32(pci_devfn_t dev, unsigned where, unsigned value) { - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); + unsigned addr; + addr = (dev>>4) | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + outl(value, 0xCFC); } static unsigned pci_read_config32(pci_devfn_t dev, unsigned where) { - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); + unsigned addr; + addr = (dev>>4) | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + return inl(0xCFC); } #include "../../../northbridge/amd/amdk8/reset_test.c" @@ -43,7 +43,7 @@ static unsigned pci_read_config32(pci_devfn_t dev, unsigned where) void hard_reset(void) { set_bios_reset(); - /* Try rebooting through port 0xcf9 */ + /* Try rebooting through port 0xcf9 */ /* Actually it is not a real hard_reset --- it only reset coherent link table, but not reset link freq and width */ outb((0 <<3)|(0<<2)|(1<<1), 0xcf9); outb((0 <<3)|(1<<2)|(1<<1), 0xcf9); |