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authorYinghai Lu <yinghailu@gmail.com>2006-02-16 17:22:19 +0000
committerYinghai Lu <yinghailu@gmail.com>2006-02-16 17:22:19 +0000
commitafd34e61ace6476946f9f30af92e0f714c901013 (patch)
tree82e1e5673992e2150bb87de3f1d5b6ee955b2b36 /src/southbridge/broadcom/bcm5780
parent4d5865d3d48259f43a1d78af8107d46c7a3a73f3 (diff)
serverworks HT1000/HT2000, bcm5785/5780 support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/broadcom/bcm5780')
-rw-r--r--src/southbridge/broadcom/bcm5780/Config.lb3
-rw-r--r--src/southbridge/broadcom/bcm5780/bcm5780_nic.c49
-rw-r--r--src/southbridge/broadcom/bcm5780/bcm5780_pcie.c46
-rw-r--r--src/southbridge/broadcom/bcm5780/bcm5780_pcix.c37
4 files changed, 135 insertions, 0 deletions
diff --git a/src/southbridge/broadcom/bcm5780/Config.lb b/src/southbridge/broadcom/bcm5780/Config.lb
new file mode 100644
index 0000000000..69153ef75d
--- /dev/null
+++ b/src/southbridge/broadcom/bcm5780/Config.lb
@@ -0,0 +1,3 @@
+driver bcm5780_nic.o
+driver bcm5780_pcix.o
+driver bcm5780_pcie.o
diff --git a/src/southbridge/broadcom/bcm5780/bcm5780_nic.c b/src/southbridge/broadcom/bcm5780/bcm5780_nic.c
new file mode 100644
index 0000000000..8033f4d5c4
--- /dev/null
+++ b/src/southbridge/broadcom/bcm5780/bcm5780_nic.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright 2005 AMD
+ * by yinghai.lu@amd.com
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+
+
+static void nic_init(struct device *dev)
+{
+
+#if CONFIG_PCI_ROM_RUN == 1
+ pci_dev_init(dev);// it will init option rom
+#endif
+
+}
+
+static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+{
+ pci_write_config32(dev, 0x40,
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+
+static struct pci_operations lops_pci = {
+ .set_subsystem = lpci_set_subsystem,
+};
+
+static struct device_operations nic_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = nic_init,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
+};
+static struct pci_driver nic_driver __pci_driver = {
+ .ops = &nic_ops,
+ .vendor = PCI_VENDOR_ID_BROADCOM,
+ .device = PCI_DEVICE_ID_BROADCOM_BCM5780_NIC,
+};
+static struct pci_driver nic1_driver __pci_driver = {
+ .ops = &nic_ops,
+ .vendor = PCI_VENDOR_ID_BROADCOM,
+ .device = PCI_DEVICE_ID_BROADCOM_BCM5780_NIC1,
+};
diff --git a/src/southbridge/broadcom/bcm5780/bcm5780_pcie.c b/src/southbridge/broadcom/bcm5780/bcm5780_pcie.c
new file mode 100644
index 0000000000..24691775de
--- /dev/null
+++ b/src/southbridge/broadcom/bcm5780/bcm5780_pcie.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2005 AMD
+ * by yinghai.lu@amd.com
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+
+static void pcie_init(struct device *dev)
+{
+
+ /* Enable pci error detecting */
+ uint32_t dword;
+
+ /* System error enable */
+ dword = pci_read_config32(dev, 0x04);
+ dword |= (1<<8); /* System error enable */
+ dword |= (1<<30); /* Clear possible errors */
+ pci_write_config32(dev, 0x04, dword);
+
+}
+
+static struct pci_operations lops_pci = {
+ .set_subsystem = 0,
+};
+
+static struct device_operations pcie_ops = {
+ .read_resources = pci_bus_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_bus_enable_resources,
+ .init = pcie_init,
+ .scan_bus = pci_scan_bridge,
+ .reset_bus = pci_bus_reset,
+ .ops_pci = &lops_pci,
+
+};
+
+static struct pci_driver pcie_driver __pci_driver = {
+ .ops = &pcie_ops,
+ .vendor = PCI_VENDOR_ID_SERVERWORKS,
+ .device = PCI_DEVICE_ID_SERVERWORKS_BCM5780_PCIE,
+};
+
diff --git a/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c b/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
new file mode 100644
index 0000000000..d8f1c246ce
--- /dev/null
+++ b/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright 2005 AMD
+ * by yinghai.lu@amd.com
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+
+static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+{
+ pci_write_config32(dev, 0x40,
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+static struct pci_operations lops_pci = {
+ .set_subsystem = lpci_set_subsystem,
+};
+
+static struct device_operations ht_ops = {
+ .read_resources = pci_bus_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_bus_enable_resources,
+ .init = 0 ,
+ .scan_bus = pci_scan_bridge,
+ .reset_bus = pci_bus_reset,
+ .ops_pci = &lops_pci,
+
+};
+
+static struct pci_driver ht_driver __pci_driver = {
+ .ops = &ht_ops,
+ .vendor = PCI_VENDOR_ID_SERVERWORKS,
+ .device = PCI_DEVICE_ID_SERVERWORKS_BCM5780_PXB,
+};
+