diff options
| author | Li-Ta Lo <ollie@lanl.gov> | 2006-04-26 22:07:16 +0000 |
|---|---|---|
| committer | Li-Ta Lo <ollie@lanl.gov> | 2006-04-26 22:07:16 +0000 |
| commit | b7a09b4f19aa5e9d23118d32e523470e590318eb (patch) | |
| tree | b9a53ab2f4647cf59d6c2201bc22804f748a822b /src/southbridge/amd | |
| parent | ae11b37ea54fc1716797a32223fc0a86aed3aab5 (diff) | |
some todo and comment for ron.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536_early_setup.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c index 99cc5d28c5..eb8f9f5140 100644 --- a/src/southbridge/amd/cs5536/cs5536_early_setup.c +++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c @@ -156,12 +156,23 @@ static void dummy(void) } /* see page 412 of the cs5536 companion book */ -static int cs5536_setup_onchipuart(void) { +static int cs5536_setup_onchipuart(void) +{ + /* ToDo: + * 1. Eanble GPIO 8 to OUT_AUX1, 9 to IN_AUX1 + * GPIO LBAR + 0x04, LBAR + 0x10, LBAR + 0x20, LBAR + 34 + * 2. Enable UART IO space in MDD + * MSR 0x51400014 bit 18:16 + * 3. Enable UART controller + * MSR 0x5140003A bit 0, 1 + * 4. IRQ routing on IRQ Mapper + * MSR 0x51400021 bit [27:24] + */ msr_t msr; msr.lo = 2; msr.hi = 0; - wrmsr(0x5160003a, msr); - wrmsr(0x5160003e, msr); + wrmsr(0x5140003a, msr); + wrmsr(0x5140003e, msr); } static int cs5536_early_setup(void) |