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authorElyes HAOUAS <ehaouas@noos.fr>2018-05-03 17:21:02 +0200
committerMartin Roth <martinroth@google.com>2018-05-08 03:04:33 +0000
commitf9de5a4b43f26fc892c1397a900e4c64a6715736 (patch)
treee3e5ea38f38edcf71b5a887b20f02e902f6cfe4e /src/southbridge/amd
parentc4c2d4ec7ad10d8928929e7042c4e7a1b97e98b8 (diff)
src/southbridge: Add required space before the open parenthesis
Change-Id: If46db4d210e4b25221436ad1222433d3b00e08e7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26035 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/sr5650/early_setup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/sr5650/early_setup.c b/src/southbridge/amd/sr5650/early_setup.c
index 98b60fd152..57a300c64b 100644
--- a/src/southbridge/amd/sr5650/early_setup.c
+++ b/src/southbridge/amd/sr5650/early_setup.c
@@ -104,7 +104,7 @@ static u8 get_nb_rev(device_t nb_dev)
{
u8 reg;
reg = pci_read_config8(nb_dev, 0x8); /* copy from CIM, can't find in doc */
- switch(reg & 3)
+ switch (reg & 3)
{
case 0x00:
reg = REV_SR5650_A11;