diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2011-01-01 23:30:37 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2011-01-01 23:30:37 +0000 |
commit | d6a1373da2c4f49b1f96b6516bc88c72de7338b4 (patch) | |
tree | f478e916e4ed3f66cbdada379a4b4d10da628bd5 /src/southbridge/amd | |
parent | f9bd9ae9eb7809c1fd513e0a4cdcd1b630aacb25 (diff) |
AMD SB800: Drop component prefix from filenames.
We did the same with other chipsets in r6150.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6236 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
16 files changed, 44 insertions, 87 deletions
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Amd.h b/src/southbridge/amd/cimx_wrapper/sb800/Amd.h index cbe6d5d06a..b7fd045745 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Amd.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/Amd.h @@ -35,20 +35,15 @@ *
*/
-
#ifndef _AMD_H_
#define _AMD_H_
-//
-//
// AGESA Types and Definitions
-//
-//
+
#ifndef NULL
#define NULL 0
#endif
-
#define LAST_ENTRY 0xFFFFFFFF
#define IOCF8 0xCF8
#define IOCFC 0xCFC
@@ -58,7 +53,6 @@ typedef UINTN AGESA_STATUS;
-
#define AGESA_SUCCESS ((AGESA_STATUS) 0x0)
#define AGESA_ALERT ((AGESA_STATUS) 0x40000000)
#define AGESA_WARNING ((AGESA_STATUS) 0x40000001)
@@ -131,7 +125,6 @@ typedef struct _AMD_MODULE_HEADER { IN struct _AMD_MODULE_HEADER *NextBlockPtr; ///< Next module header link
} AMD_MODULE_HEADER;
-
#define FUNC_0 0 // bit-placed for PCI address creation
#define FUNC_1 1
#define FUNC_2 2
@@ -378,4 +371,5 @@ typedef enum { #ifndef BIT63
#define BIT63 0x8000000000000000ull
#endif
+
#endif
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h b/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h index c5fd22b694..48177ed177 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h @@ -36,7 +36,6 @@ typedef CHAR8 *va_list; #define va_arg(ap, t) ( *(t *) ((ap += _INTSIZEOF (t)) - _INTSIZEOF (t)) )
#define va_end(ap) ( ap = (va_list)0 )
-
#pragma pack (push, 1)
#define IMAGE_ALIGN 32*1024
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Kconfig b/src/southbridge/amd/cimx_wrapper/sb800/Kconfig index a24b29c1f1..8b9ddf820e 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Kconfig +++ b/src/southbridge/amd/cimx_wrapper/sb800/Kconfig @@ -17,10 +17,11 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## - if SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800 + config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx_wrapper/sb800/bootblock.c" -endif #SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800 + string + default "southbridge/amd/cimx_wrapper/sb800/bootblock.c" + +endif diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc b/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc index 204c4ffab3..c48234d1f5 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc @@ -23,13 +23,13 @@ subdirs-y += ../../../../../src/vendorcode/amd/cimx/lib # SB800 Platform Files -romstage-y += sb800_cfg.c -romstage-y += sb800_early.c -romstage-y += sb800_smbus.c +romstage-y += cfg.c +romstage-y += early.c +romstage-y += smbus.c -ramstage-y += sb800_cfg.c -ramstage-y += sb800_late.c +ramstage-y += cfg.c +ramstage-y += late.c -driver-y += sb800_smbus.c -driver-y += sb800_lpc.c +driver-y += smbus.c +driver-y += lpc.c diff --git a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h index 10409f2017..ea71c44148 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h @@ -24,18 +24,18 @@ #ifndef _AMD_SBPLATFORM_H_
#define _AMD_SBPLATFORM_H_
-#include "cbtypes.h"
+#include <southbridge/amd/cimx_wrapper/sb800/cbtypes.h>
typedef UINT64 PLACEHOLDER;
-#include "Amdlib.h"
-#include "Amd.h"
-#include "amdlib32.h"//TODO merge with agesa wrapper
-#include "SB800.h"
-#include "SBTYPE.h"
-#include "ACPILIB.h"
-#include "SBDEF.h"
-#include "AMDSBLIB.h"
-#include "SBSUBFUN.h"
-#include "OEM.h"
+#include <southbridge/amd/cimx_wrapper/sb800/Amdlib.h>
+#include <southbridge/amd/cimx_wrapper/sb800/Amd.h>
+#include <vendorcode/amd/cimx/lib/amdlib32.h> //TODO merge with agesa wrapper
+#include <vendorcode/amd/cimx/sb800/SB800.h>
+#include <vendorcode/amd/cimx/sb800/SBTYPE.h>
+#include <vendorcode/amd/cimx/sb800/ACPILIB.h>
+#include <vendorcode/amd/cimx/sb800/SBDEF.h>
+#include <vendorcode/amd/cimx/sb800/AMDSBLIB.h>
+#include <vendorcode/amd/cimx/sb800/SBSUBFUN.h>
+#include <vendorcode/amd/cimx/sb800/OEM.h>
#ifdef NULL
#undef NULL
@@ -66,9 +66,6 @@ typedef union _PCI_ADDR { #define FIXUP_PTR(ptr) ptr
-
-
-
//------------------------------------------------------------------------------------------------------------------------//
/**
* SB_CIMx_PARAMETER 0 1 2 Defult Value When CIMx Take over
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h b/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h index df5143aeb2..706d9153cd 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h @@ -17,7 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #ifndef _CIMX_SB_EARLY_H_ #define _CIMX_SB_EARLY_H_ diff --git a/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c b/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c index 51160e5dc2..a29bf8c3f5 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c @@ -17,11 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #include <arch/io.h> #include <arch/romcc_io.h> - #if CONFIG_SERIAL_POST == 1 /* Data */ @@ -53,7 +51,6 @@ #endif // CONFIG_SERIAL_POST == 1 - static void sb800_enable_rom(void) { u32 word; @@ -90,7 +87,6 @@ static void sb800_enable_rom(void) pci_io_write_config16(dev, 0x6c, word); } - static void uart_init(void) { #if CONFIG_SERIAL_POST == 1 @@ -106,7 +102,6 @@ static void uart_init(void) #endif // CONFIG_SERIAL_POST == 1 } - static void bootblock_southbridge_init(void) { /* Setup the rom access for 2M */ diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c b/src/southbridge/amd/cimx_wrapper/sb800/cfg.c index 9d772b6d05..64fb0ff115 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/cfg.c @@ -17,10 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - -#include "SBPLATFORM.h" -#include "sb800_cfg.h" - +#include <southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h> +#include <southbridge/amd/cimx_wrapper/sb800/cfg.h> /** * @brief South Bridge CIMx configuration @@ -124,4 +122,3 @@ void sb800_cimx_config(AMDSBCFG *sb_config) //sb_config-> #endif //!__PRE_RAM__ } - diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h b/src/southbridge/amd/cimx_wrapper/sb800/cfg.h index a3d8a290a7..9fae525cb9 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/cfg.h @@ -17,13 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #ifndef _SB800_CFG_H_ #define _SB800_CFG_H_ #include <stdint.h> - /** * @def BIOS_SIZE_1M * @def BIOS_SIZE_2M @@ -150,7 +148,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1 - /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. @@ -218,10 +215,8 @@ #define GPP_CFGMODE GPP_CFGMODE_X1111 #endif - /** * @brief South Bridge CIMx configuration - * */ void sb800_cimx_config(AMDSBCFG *sb_cfg); @@ -233,7 +228,6 @@ void sb800_cimx_config(AMDSBCFG *sb_cfg); * @param[in] func Southbridge CIMx Function ID. * @param[in] data Southbridge Input Data. * @param[in] sb_cfg Southbridge configuration structure pointer. - * */ u32 sb800_callout_entry(u32 func, u32 data, void* sb_cfg); diff --git a/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c b/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c index 4a9ede9388..817f49fb09 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c @@ -21,5 +21,5 @@ #include "chip.h" struct chip_operations southbridge_amd_cimx_wrapper_sb800_ops = { - CHIP_NAME("AMD South Bridge SB800") + CHIP_NAME("AMD SB800 Southbridge") }; diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c b/src/southbridge/amd/cimx_wrapper/sb800/early.c index 871c423e31..a97bdb3253 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/early.c @@ -17,16 +17,14 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - //#include <config.h> #include <stdint.h> #include <device/pci_ids.h> -#include <arch/io.h> /* inl, outl */ -#include <arch/romcc_io.h> /* device_t */ -#include "SBPLATFORM.h" -#include "SbEarly.h" -#include "sb800_cfg.h" /*sb800_cimx_config*/ - +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h> +#include <southbridge/amd/cimx_wrapper/sb800/SbEarly.h> +#include <southbridge/amd/cimx_wrapper/sb800/cfg.h> /** * @brief Get SouthBridge device number @@ -45,7 +43,6 @@ u32 get_sbdn(u32 bus) return (dev >> 15) & 0x1f; } - /** * @brief South Bridge CIMx romstage entry, * wrapper of sbPowerOnInit entry point. diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c b/src/southbridge/amd/cimx_wrapper/sb800/late.c index 1ef5b1f83d..1df3edcc09 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/late.c @@ -17,17 +17,15 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - -#include <device/device.h> /* device_t */ -#include <device/pci.h> /* device_operations */ +#include <device/device.h> +#include <device/pci.h> #include <device/pci_ids.h> -#include <device/smbus.h> /* smbus_bus_operations */ -#include <console/console.h> /* printk */ -#include "sb800_lpc.h" /* lpc_read_resources */ -#include "SBPLATFORM.h" /* Platfrom Specific Definitions */ -#include "sb800_cfg.h" /* sb800 Cimx configuration */ -#include "chip.h" /* struct southbridge_amd_cimx_wrapper_sb800_config */ - +#include <device/smbus.h> +#include <console/console.h> +#include <southbridge/amd/cimx_wrapper/sb800/lpc.h> +#include <southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h> +#include <southbridge/amd/cimx_wrapper/sb800/cfg.h> +#include "chip.h" /*implement in mainboard.c*/ //void set_pcie_assert(void); @@ -35,14 +33,13 @@ void set_pcie_reset(void); void set_pcie_dereset(void); - #ifndef _RAMSTAGE_ #define _RAMSTAGE_ #endif + static AMDSBCFG sb_late_cfg; //global, init in sb800_cimx_config static AMDSBCFG *sb_config = &sb_late_cfg; - /** * @brief Entry point of Southbridge CIMx callout * @@ -78,14 +75,12 @@ u32 sb800_callout_entry(u32 func, u32 data, void* config) return ret; } - static struct pci_operations lops_pci = { .set_subsystem = 0, }; static void lpc_enable_resources(device_t dev) { - pci_dev_enable_resources(dev); //lpc_enable_childrens_resources(dev); } @@ -111,7 +106,6 @@ static const struct pci_driver lpc_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_LPC, }; - static void sata_enable_resources(struct device *dev) { sataInitAfterPciEnum(sb_config); @@ -141,7 +135,6 @@ static const struct pci_driver sata_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_SATA, //SATA IDE Mode 4390 }; - #if CONFIG_USBDEBUG static void usb_set_resources(struct device *dev) { @@ -225,7 +218,6 @@ static const struct pci_driver azalia_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_HDA, }; - static void gec_init(struct device *dev) { gecInitAfterPciEnum(sb_config); @@ -248,7 +240,6 @@ static const struct pci_driver gec_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_GEC, }; - static void pcie_init(device_t dev) { sbPcieGppLateInit(sb_config); @@ -270,7 +261,6 @@ static const struct pci_driver pci_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_PCI, }; - struct device_operations bridge_ops = { .read_resources = pci_bus_read_resources, .set_resources = pci_dev_set_resources, @@ -310,7 +300,6 @@ static const struct pci_driver PORTD_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_PCIED, }; - /** * @brief SB Cimx entry point sbBeforePciInit wrapper */ diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c b/src/southbridge/amd/cimx_wrapper/sb800/lpc.c index 6a64aa9cc9..7cc4d27efa 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/lpc.c @@ -18,8 +18,7 @@ */ #include <device/pci.h> -#include "sb800_lpc.h" - +#include <southbridge/amd/cimx_wrapper/sb800/lpc.h> void lpc_read_resources(device_t dev) { @@ -60,7 +59,6 @@ void lpc_set_resources(struct device *dev) /* Specical case. SPI Base Address. The SpiRomEnable should be set. */ res = find_resource(dev, SPIROM_BASE_ADDRESS); pci_write_config32(dev, SPIROM_BASE_ADDRESS, res->base | 1 << 1); - } /** diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h b/src/southbridge/amd/cimx_wrapper/sb800/lpc.h index 8fc4f6c16d..00f15a3ebc 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/lpc.h @@ -20,7 +20,6 @@ #ifndef _SB800_LPC_H_ #define _SB800_LPC_H_ - #define SPIROM_BASE_ADDRESS 0xA0 /* SPI ROM base address */ void lpc_read_resources(device_t dev); diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c b/src/southbridge/amd/cimx_wrapper/sb800/smbus.c index e5ac4b8aba..6599cafc30 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/smbus.c @@ -17,9 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #include <arch/io.h> -#include "sb800_smbus.h" +#include <southbridge/amd/cimx_wrapper/sb800/smbus.h> static inline void smbus_delay(void) { @@ -248,4 +247,3 @@ void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, u32 mask, u32 val) outl(tmp, AB_DATA); outl(0, AB_INDX); } - diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h b/src/southbridge/amd/cimx_wrapper/sb800/smbus.h index 6f00a85cf0..6f00a85cf0 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/smbus.h |