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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-20 20:02:49 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-12 22:16:09 +0100 |
| commit | 7fd3ef57cba80f8ef2e9ecc500124e1e56d05325 (patch) | |
| tree | 0192e10c000be8ee142e462f1044497672e9914f /src/southbridge/amd | |
| parent | 14ebf951e41c085aa2f8420fcf7452dc5761514e (diff) | |
northbridge/amd/amdmct: Clear memory before enabling ECC
The existing code enabled ECC before clearing memory. As the
AMD CPUs will generate MCEs on any invalid check bits, this
resulted in random lockups during memory training due to the
uniniailized check bits.
Initialize ECC check bits before enabling ECC hardware.
Change-Id: I992e7040520570893ba6a213138dd57bfa14733b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11996
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd')
0 files changed, 0 insertions, 0 deletions