diff options
author | Yinghai Lu <yinghailu@gmail.com> | 2004-05-05 18:03:42 +0000 |
---|---|---|
committer | Yinghai Lu <yinghailu@gmail.com> | 2004-05-05 18:03:42 +0000 |
commit | 7ccff4ea0c1773e57b380cf7477febd64b58afea (patch) | |
tree | 8eb413540a69e0e9cf8bc7359879e10be85f2651 /src/southbridge/amd | |
parent | 52f851dd1da8cefb3fb6e4795dc419d76d2b50b1 (diff) |
Disable AMD8111 USB2 and remove hard code addr in amd8111 IDE
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r-- | src/southbridge/amd/amd8111/amd8111.c | 14 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/amd8111_ide.c | 18 |
2 files changed, 19 insertions, 13 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c index e576ea8f0c..2c5d1e80fe 100644 --- a/src/southbridge/amd/amd8111/amd8111.c +++ b/src/southbridge/amd/amd8111/amd8111.c @@ -11,6 +11,7 @@ void amd8111_enable(device_t dev) device_t bus_dev; unsigned index; uint16_t reg_old, reg; + uint8_t byte; /* See if we are on the behind the amd8111 pci bridge */ bus_dev = dev->bus->dev; @@ -38,6 +39,18 @@ void amd8111_enable(device_t dev) return; } } + + if ((dev->vendor == PCI_VENDOR_ID_AMD) && + (dev->device == PCI_DEVICE_ID_AMD_8111_USB2)) { + if(!dev->enabled) { + byte = pci_read_config8(lpc_dev, 0x47); + byte |= (1<<7); + pci_write_config8(lpc_dev, 0x47, byte); + return; + } + + } + reg = reg_old = pci_read_config16(lpc_dev, 0x48); reg &= ~(1 << index); if (dev->enabled) { @@ -46,6 +59,7 @@ void amd8111_enable(device_t dev) if (reg != reg_old) { pci_write_config16(lpc_dev, 0x48, reg); } + } struct chip_control southbridge_amd_amd8111_control = { diff --git a/src/southbridge/amd/amd8111/amd8111_ide.c b/src/southbridge/amd/amd8111/amd8111_ide.c index 6f8e018fe6..a92274695d 100644 --- a/src/southbridge/amd/amd8111/amd8111_ide.c +++ b/src/southbridge/amd/amd8111/amd8111_ide.c @@ -10,6 +10,7 @@ static void ide_init(struct device *dev) /* Enable ide devices so the linux ide driver will work */ uint16_t word; + uint8_t byte; int enable_a=1, enable_b=1; word = pci_read_config16(dev, 0x40); @@ -31,21 +32,12 @@ static void ide_init(struct device *dev) pci_write_config16(dev, 0x40, word); - word = 0x0f; - pci_write_config16(dev, 0x42, word); - /* The AMD768 has a bug where the BM DMA address must be - * 256 byte aligned while it is only 16 bytes long. - * Hard code this to a valid address below 0x1000 - * where automatic port address assignment starts. - * FIXME: I assume the 8111 does the same thing. We should - * clarify. stepan@suse.de - */ - pci_write_config32(dev, 0x20, 0xf01); + byte = 0x20 ; // Latency: 64-->32 + pci_write_config8(dev, 0xd, byte); - pci_write_config32(dev, 0x48, 0x205e5e5e); - word = 0x06a; - pci_write_config16(dev, 0x4c, word); + word = 0x0f; + pci_write_config16(dev, 0x42, word); } static struct device_operations ide_ops = { |