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author | Matt DeVillier <matt.devillier@gmail.com> | 2018-01-21 18:32:07 -0600 |
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committer | Matt DeVillier <matt.devillier@gmail.com> | 2020-04-03 16:24:17 +0000 |
commit | a2804781feaa7ba7db198fa03f20be861ccbe4a3 (patch) | |
tree | 9a51f141132eb0805667c05a8a24908f4793a564 /src/southbridge/amd | |
parent | 8fbfcc3a06d2dde8aa625db123b42cfe29aa0752 (diff) |
mb/google/cyan: Switch eMMC and SD from ACPI to PCI mode
Braswell boards don't work well with the eMMC and SD controller
in ACPI in payloads other than depthcharge - SeaBIOS requires
an onerous workaround (manually determining the PCI BAR0 address
for each eMMC and SD controller, then adding adding etc/sdcard
entries to the CBFS), and Tianocore can't see the devices at all.
To make the common use-case work better, switch to PCI mode.
Test: build/boot cyan variants with SeaBIOS and Tianocore
payloads, verify eMMC and SD card visible and bootable to
both payloads and OSes.
Change-Id: I71947603e22a37fe2c8ef4eaac8a3aa0d0ed1cec
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40002
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd')
0 files changed, 0 insertions, 0 deletions