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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-01-10 07:25:15 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-01-10 13:52:31 +0100
commit2320cbebc667ac6871d4d6c8b59fee27ba6e75e5 (patch)
tree106486d35bb9a70038d164ecfccf6c6699c31e62 /src/southbridge/amd
parent7a846e7acc64c191a217710234c90ae3634d09ea (diff)
AMD binaryPI: Drop ramtop via nvram
If HAVE_ACPI_RESUME gets implemented, EARLY_CBMEM_INIT is required too. Change-Id: I8c7932297e0938eff629d1e46081ccf3e7690aea Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8185 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/pi/avalon/early_setup.c30
-rw-r--r--src/southbridge/amd/pi/avalon/hudson.c33
2 files changed, 0 insertions, 63 deletions
diff --git a/src/southbridge/amd/pi/avalon/early_setup.c b/src/southbridge/amd/pi/avalon/early_setup.c
index 039df20c43..9500d0ec27 100644
--- a/src/southbridge/amd/pi/avalon/early_setup.c
+++ b/src/southbridge/amd/pi/avalon/early_setup.c
@@ -123,34 +123,4 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
return nvram_pos;
}
-#if CONFIG_HAVE_ACPI_RESUME
-int acpi_get_sleep_type(void)
-{
- u16 tmp = inw(ACPI_PM1_CNT_BLK);
- tmp = ((tmp & (7 << 10)) >> 10);
- /* printk(BIOS_DEBUG, "SLP_TYP type was %x\n", tmp); */
- return (int)tmp;
-}
-#endif
-
-#if CONFIG_HAVE_ACPI_RESUME
-int acpi_is_wakeup_early(void)
-{
- return (acpi_get_sleep_type() == 3);
-}
-#endif
-
-unsigned long get_top_of_ram(void)
-{
- uint32_t xdata = 0;
- int xnvram_pos = 0xf8, xi;
- for (xi = 0; xi<4; xi++) {
- outb(xnvram_pos, BIOSRAM_INDEX);
- xdata &= ~(0xff << (xi * 8));
- xdata |= inb(BIOSRAM_DATA) << (xi *8);
- xnvram_pos++;
- }
- return (unsigned long) xdata;
-}
-
#endif
diff --git a/src/southbridge/amd/pi/avalon/hudson.c b/src/southbridge/amd/pi/avalon/hudson.c
index 84eaf30f8c..3c07ed26cf 100644
--- a/src/southbridge/amd/pi/avalon/hudson.c
+++ b/src/southbridge/amd/pi/avalon/hudson.c
@@ -38,28 +38,12 @@
#define PM_MMIO_BASE 0xfed80300
-#if CONFIG_HAVE_ACPI_RESUME
int acpi_get_sleep_type(void)
{
u16 tmp = inw(ACPI_PM1_CNT_BLK);
tmp = ((tmp & (7 << 10)) >> 10);
- /* printk(BIOS_DEBUG, "SLP_TYP type was %x\n", tmp); */
return (int)tmp;
}
-#endif
-
-void backup_top_of_ram(uint64_t ramtop)
-{
- u32 dword = (u32) ramtop;
- int nvram_pos = 0xf8, i; /* temp */
- /* printk(BIOS_DEBUG, "dword=%x\n", dword); */
- for (i = 0; i<4; i++) {
- /* printk(BIOS_DEBUG, "nvram_pos=%x, dword>>(8*i)=%x\n", nvram_pos, (dword >>(8 * i)) & 0xff); */
- outb(nvram_pos, BIOSRAM_INDEX);
- outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
- nvram_pos++;
- }
-}
void pm_write8(u8 reg, u8 value)
{
@@ -113,23 +97,6 @@ void hudson_enable(device_t dev)
}
}
-#if CONFIG_HAVE_ACPI_RESUME
-unsigned long get_top_of_ram(void)
-{
- uint32_t xdata = 0;
- int xnvram_pos = 0xf8, xi;
- if (acpi_get_sleep_type() != 3)
- return 0;
- for (xi = 0; xi<4; xi++) {
- outb(xnvram_pos, BIOSRAM_INDEX);
- xdata &= ~(0xff << (xi * 8));
- xdata |= inb(BIOSRAM_DATA) << (xi *8);
- xnvram_pos++;
- }
- return (unsigned long) xdata;
-}
-#endif
-
static void hudson_init_acpi_ports(void)
{
/* We use some of these ports in SMM regardless of whether or not