diff options
| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2010-11-24 19:57:08 +0000 |
|---|---|---|
| committer | Tobias Diedrich <ranma@tdiedrich.de> | 2010-11-24 19:57:08 +0000 |
| commit | ba9f0b30fb3d2081e30c8957194f3a0a202bc2ef (patch) | |
| tree | b8d0db111c0363d70d0a57f131616e7d6f8f475d /src/southbridge/amd | |
| parent | 88dc53178177c3cfc28bfebab2422dc4133bd7dc (diff) | |
With low serial console loglevels a pcie graphics card is not
initialized properly because the pcie link takes some time to come
up.
I set the timeout rather arbitrary to 100ms, this is what a BIOS_ERR
and higher only boot looks like on my system (with pcie printks set
to BIOS_ERR so they show up):
|Device error
|Device error
|PCI: 00:02.0 PCIe link up after 35800 us
|PCI: 00:03.0 PCIe link up after 12900 us
|PCI: 00:03.1 PCIe link timeout
|PCI: 00:03.2 PCIe link up after 32000 us
|APIC: 00 missing read_resources
|I2C: 01:50 missing read_resources
|I2C: 01:51 missing read_resources
|I2C: 01:52 missing read_resources
|I2C: 01:53 missing read_resources
|Start bios (version pre-0.6.2-20101025_023503-nukunuku)
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6121 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
0 files changed, 0 insertions, 0 deletions