diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-19 03:48:42 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-25 05:43:43 +0200 |
commit | 4f7cb87df2a4b2d1da6c1e759a3a69bc36626850 (patch) | |
tree | f9b5df18d7854c87008428af4c341e3651a80bf7 /src/southbridge/amd | |
parent | 207880cd1127acd6f5f0f2241d753aa6b1c39da0 (diff) |
AGESA: Move config parameters for non-volatile S3 data
These parameters are not specific to the southbridge device, but
the implementation of S3 storage defined by CPU code.
Change-Id: Ic341cc2b7669cf8e3e920c48473826ec03fc7d8d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6081
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r-- | src/southbridge/amd/Makefile.inc | 17 | ||||
-rw-r--r-- | src/southbridge/amd/agesa/hudson/Kconfig | 16 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb700/Kconfig | 16 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/Kconfig | 16 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb900/Kconfig | 16 |
5 files changed, 0 insertions, 81 deletions
diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc index 9ec0171c4f..e2f3f9c422 100644 --- a/src/southbridge/amd/Makefile.inc +++ b/src/southbridge/amd/Makefile.inc @@ -16,20 +16,3 @@ subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800) += cimx subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900) += cimx subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += agesa subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += agesa - -ifeq ($(CONFIG_HAVE_ACPI_RESUME), y) -ifeq ($(CONFIG_CPU_AMD_AGESA), y) - -$(obj)/coreboot_s3nv.rom: $(obj)/config.h - echo " S3 NVRAM $(CONFIG_S3_DATA_POS) (S3 storage area)" - # force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse) - printf %d $(CONFIG_S3_DATA_SIZE) | LC_ALL=C awk '{for (i=0; i<$$1; i++) {printf "%c", 255}}' > $@.tmp - mv $@.tmp $@ - -cbfs-files-y += s3nv -s3nv-file := $(obj)/coreboot_s3nv.rom -s3nv-position := $(CONFIG_S3_DATA_POS) -s3nv-type := raw - -endif # CONFIG_CPU_AMD_AGESA == y -endif # CONFIG_HAVE_ACPI_RESUME == y diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 9e21b849fe..a0c68a323d 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -215,22 +215,6 @@ config RAID_MISC_ROM_POSITION The CONFIG_ROM_SIZE must larger than 0x100000. endif # HUDSON_SATA_RAID -config S3_DATA_POS - hex "S3 volatile storage position" - default 0xFFFF0000 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - -config S3_DATA_SIZE - int "S3 volatile storage size" - default 32768 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - config HUDSON_LEGACY_FREE bool "System is legacy free" help diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig index d8bad86007..a4f9aa095f 100644 --- a/src/southbridge/amd/cimx/sb700/Kconfig +++ b/src/southbridge/amd/cimx/sb700/Kconfig @@ -67,21 +67,5 @@ config REDIRECT_SBCIMX_TRACE_TO_SERIAL Warning: Only enable this option when debuging or tracing AMD CIMX code. -config S3_DATA_POS - hex "S3 volatile storage position" - default 0xFFFF0000 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - -config S3_DATA_SIZE - int "S3 volatile storage size" - default 32768 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - endif #SOUTHBRIDGE_AMD_CIMX_SB700 diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 832655d16d..ac25e896f2 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -124,22 +124,6 @@ config RAID_MISC_ROM_POSITION endif -config S3_DATA_POS - hex "S3 volatile storage position" - default 0xFFFF0000 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - -config S3_DATA_SIZE - int "S3 volatile storage size" - default 32768 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - config SB800_IMC_FWM bool "Add IMC firmware" default n diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig index 5d3b0a1328..3bef95a113 100644 --- a/src/southbridge/amd/cimx/sb900/Kconfig +++ b/src/southbridge/amd/cimx/sb900/Kconfig @@ -54,21 +54,5 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/amd/cimx/sb900/bootblock.c" -config S3_DATA_POS - hex "S3 volatile storage position" - default 0xFFFF0000 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - -config S3_DATA_SIZE - int "S3 volatile storage size" - default 32768 - depends on HAVE_ACPI_RESUME - help - For a system with S3 feature, the BIOS needs to save some data to - non-volatile storage at cold boot stage. - endif #SOUTHBRIDGE_AMD_CIMX_SB900 |