diff options
| author | Nico Huber <nico.h@gmx.de> | 2020-06-07 15:54:32 +0000 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-09 06:28:47 +0000 |
| commit | e9e13d41e9869946a398267457eb4ca698361572 (patch) | |
| tree | 705630fa473afd4b6ad86b53b03797531a4bf607 /src/southbridge/amd | |
| parent | 45aea0b1d0b6047339a979b976040f628b9728fa (diff) | |
Revert "sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register"
This reverts commit 04506e2987162ec0f280afddd6f4acac070bbf15.
Turned out that `dev->command` is only a `u8` and the way it's used
here is wrong: It is not supposed to reflect the state of the register
but only gathers (lower) bits to be enabled during allocation.
Change-Id: Iacd2b753939e8adcf5aedd4b9cf101638a324aa6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42163
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index d57ce006a3..43a88b7cd0 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -98,7 +98,7 @@ static void ahci_raid_init(struct device *dev) } dev->command |= PCI_COMMAND_MASTER; - pci_write_config16(dev, PCI_COMMAND, dev->command); + pci_write_config8(dev, PCI_COMMAND, dev->command); printk(BIOS_DEBUG, "AHCI/RAID controller initialized\n"); } |