diff options
| author | Marc Jones <marcj303@gmail.com> | 2017-10-26 16:42:03 -0600 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2017-10-31 02:22:02 +0000 |
| commit | 6e70d67824e7c12a590038379866dbc7d7418fea (patch) | |
| tree | a7f707c271e60d6c7b4c551f1b3dac49a27dedaf /src/southbridge/amd/sr5650 | |
| parent | c68d410ef7bc98abb1f602473569294e3d6828a4 (diff) | |
soc/amd/common: Add weak call for platform PCIE slot reset
Since it is fairly uncommon, add a weak call that may be done by
the platform if it has the support.
BUG=b:66690176
BRANCH=none
TEST=coreboot builds.
Change-Id: I50008da6f85039a428184bf9e7642c0aa6610247
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/sr5650')
0 files changed, 0 insertions, 0 deletions