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authorElyes HAOUAS <ehaouas@noos.fr>2016-08-31 19:22:16 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:22:46 +0200
commitba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch)
tree9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/amd/sr5650/sr5650.c
parent2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff)
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16291 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/amd/sr5650/sr5650.c')
-rw-r--r--src/southbridge/amd/sr5650/sr5650.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c
index d28adfc042..87845c6d89 100644
--- a/src/southbridge/amd/sr5650/sr5650.c
+++ b/src/southbridge/amd/sr5650/sr5650.c
@@ -817,8 +817,8 @@ unsigned long acpi_fill_mcfg(unsigned long current)
resource_t mmconf_base = EXT_CONF_BASE_ADDRESS;
if (IS_ENABLED(CONFIG_EXT_CONF_SUPPORT)) {
- res = sr5650_retrieve_cpu_mmio_resource();
- if (res)
+ res = sr5650_retrieve_cpu_mmio_resource();
+ if (res)
mmconf_base = res->base;
current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, mmconf_base, 0x0, 0x0, 0x1f);