x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer

On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.

Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)

5 files changed, 17 insertions, 17 deletions

diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index 74e3d3326e..ed1d88cd18 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -40,7 +40,7 @@ pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
 {
-	u32 base_regs = pci_ehci_base_regs(dev);
+	u8 *base_regs = pci_ehci_base_regs(dev);
 	u32 reg32;
 
 	/* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */
diff --git a/src/southbridge/amd/sb800/hda.c b/src/southbridge/amd/sb800/hda.c
index 5265684f29..d40d0886c8 100644
--- a/src/southbridge/amd/sb800/hda.c
+++ b/src/southbridge/amd/sb800/hda.c
@@ -30,7 +30,7 @@
 #define HDA_ICII_BUSY (1 << 0)
 #define HDA_ICII_VALID (1 << 1)
 
-static int set_bits(u32 port, u32 mask, u32 val)
+static int set_bits(void *port, u32 mask, u32 val)
 {
 	u32 dword;
 	int count;
@@ -59,7 +59,7 @@ static int set_bits(u32 port, u32 mask, u32 val)
 	return 0;
 }
 
-static u32 codec_detect(u32 base)
+static u32 codec_detect(void *base)
 {
 	u32 dword;
 
@@ -96,7 +96,7 @@ no_codec:
  *  Wait 50usec for for the codec to indicate it is ready
  *  no response would imply that the codec is non-operative
  */
-static int wait_for_ready(u32 base)
+static int wait_for_ready(void *base)
 {
 	/* Use a 50 usec timeout - the Linux kernel uses the
 	 * same duration */
@@ -118,7 +118,7 @@ static int wait_for_ready(u32 base)
  *  the previous command.  No response would imply that the code
  *  is non-operative
  */
-static int wait_for_valid(u32 base)
+static int wait_for_valid(void *base)
 {
 	/* Use a 50 usec timeout - the Linux kernel uses the
 	 * same duration */
@@ -135,7 +135,7 @@ static int wait_for_valid(u32 base)
 	return -1;
 }
 
-static void codec_init(u32 base, int addr)
+static void codec_init(void *base, int addr)
 {
 	u32 dword;
 
@@ -155,7 +155,7 @@ static void codec_init(u32 base, int addr)
 	printk(BIOS_DEBUG, "%x(th) codec viddid: %08x\n", addr, dword);
 }
 
-static void codecs_init(u32 base, u32 codec_mask)
+static void codecs_init(void *base, u32 codec_mask)
 {
 	int i;
 	for (i = 3; i >= 0; i--) {
@@ -167,7 +167,7 @@ static void codecs_init(u32 base, u32 codec_mask)
 static void hda_init(struct device *dev)
 {
 	u32 dword;
-	u32 base;
+	void *base;
 	struct resource *res;
 	u32 codec_mask;
 
@@ -183,8 +183,8 @@ static void hda_init(struct device *dev)
 	if (!res)
 		return;
 
-	base = (u32)res->base;
-	printk(BIOS_DEBUG, "base = 0x%x\n", base);
+	base = res2mmio(res, 0, 0);
+	printk(BIOS_DEBUG, "base = 0x%p\n", base);
 	codec_mask = codec_detect(base);
 
 	if (codec_mask) {
diff --git a/src/southbridge/amd/sb800/sata.c b/src/southbridge/amd/sb800/sata.c
index a1aa6e051e..cb685d1242 100644
--- a/src/southbridge/amd/sb800/sata.c
+++ b/src/southbridge/amd/sb800/sata.c
@@ -82,7 +82,7 @@ static void sata_init(struct device *dev)
 	u16 word;
 	u32 dword;
 	u8 rev_id;
-	u32 sata_bar5;
+	void *sata_bar5;
 	u16 sata_bar0, sata_bar1, sata_bar2, sata_bar3, sata_bar4;
 	int i, j;
 
@@ -98,7 +98,7 @@ static void sata_init(struct device *dev)
 	rev_id = pci_read_config8(sm_dev, 0x08) - 0x2F;
 
 	/* get base address */
-	sata_bar5 = pci_read_config32(dev, 0x24) & ~0x3FF;
+	sata_bar5 = (void *)(pci_read_config32(dev, 0x24) & ~0x3FF);
 	sata_bar0 = pci_read_config16(dev, 0x10) & ~0x7;
 	sata_bar1 = pci_read_config16(dev, 0x14) & ~0x3;
 	sata_bar2 = pci_read_config16(dev, 0x18) & ~0x7;
@@ -110,7 +110,7 @@ static void sata_init(struct device *dev)
 	printk(BIOS_SPEW, "sata_bar2=%x\n", sata_bar2);	/* 3040 */
 	printk(BIOS_SPEW, "sata_bar3=%x\n", sata_bar3);	/* 3080 */
 	printk(BIOS_SPEW, "sata_bar4=%x\n", sata_bar4);	/* 3000 */
-	printk(BIOS_SPEW, "sata_bar5=%x\n", sata_bar5);	/* e0309000 */
+	printk(BIOS_SPEW, "sata_bar5=%p\n", sata_bar5);	/* e0309000 */
 
 	/* SERR-Enable */
 	word = pci_read_config16(dev, 0x04);
diff --git a/src/southbridge/amd/sb800/sm.c b/src/southbridge/amd/sb800/sm.c
index 662a82e4ef..2f5dfa127e 100644
--- a/src/southbridge/amd/sb800/sm.c
+++ b/src/southbridge/amd/sb800/sm.c
@@ -89,7 +89,7 @@ static void sm_init(device_t dev)
 	/* Don't rename APIC ID */
 	/* TODO: We should call setup_ioapic() here. But kernel hangs if cpu is K8.
 	 * We need to check out why and change back. */
-	clear_ioapic(IO_APIC_ADDR);
+	clear_ioapic(VIO_APIC_VADDR);
 	//setup_ioapic(IO_APIC_ADDR, 0);
 
 	/* enable serial irq */
diff --git a/src/southbridge/amd/sb800/usb.c b/src/southbridge/amd/sb800/usb.c
index 55be7b88f9..9cd6397d37 100644
--- a/src/southbridge/amd/sb800/usb.c
+++ b/src/southbridge/amd/sb800/usb.c
@@ -58,7 +58,7 @@ static void usb_init(struct device *dev)
 static void usb_init2(struct device *dev)
 {
 	u32 dword;
-	u32 usb2_bar0;
+	void *usb2_bar0;
 	device_t sm_dev;
 
 	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
@@ -68,8 +68,8 @@ static void usb_init2(struct device *dev)
 	/* dword |= 40; */
 	/* pci_write_config32(dev, 0xf8, dword); */
 
-	usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
-	printk(BIOS_INFO, "usb2_bar0=0x%x\n", usb2_bar0);
+	usb2_bar0 = (void *)(pci_read_config32(dev, 0x10) & ~0xFF);
+	printk(BIOS_INFO, "usb2_bar0=0x%p\n", usb2_bar0);
 
 	/* RPR7.3 Enables the USB PHY auto calibration resister to match 45ohm resistance */
 	dword = 0x00020F00;