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authorMartin Roth <martin.roth@se-eng.com>2014-12-16 20:51:31 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-17 16:55:09 +0100
commitdcf253c74e3eb88e738f425c9a9bfd897736c2b0 (patch)
tree1105c445f31f3e11db2ec7444b840783c1ded1a4 /src/southbridge/amd/sb800/usb.c
parente9c1b211917b357f4646c8afda94f030c2e10d55 (diff)
southbridge/amd sb600, sb700 & sb900 spelling fixes
Trivial fixes, but the editor highlights them, and it's easy to go through a bunch of files while I'm otherwise idle. Change-Id: I31333742d9c90cf6d7ae3d2f324880ed53807d7f Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7840 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/amd/sb800/usb.c')
-rw-r--r--src/southbridge/amd/sb800/usb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/sb800/usb.c b/src/southbridge/amd/sb800/usb.c
index 9304344c6e..55be7b88f9 100644
--- a/src/southbridge/amd/sb800/usb.c
+++ b/src/southbridge/amd/sb800/usb.c
@@ -71,7 +71,7 @@ static void usb_init2(struct device *dev)
usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
printk(BIOS_INFO, "usb2_bar0=0x%x\n", usb2_bar0);
- /* RPR7.3 Enables the USB PHY auto calibration resister to match 45ohm resistence */
+ /* RPR7.3 Enables the USB PHY auto calibration resister to match 45ohm resistance */
dword = 0x00020F00;
write32(usb2_bar0 + 0xC0, dword);