summaryrefslogtreecommitdiff
path: root/src/southbridge/amd/sb700
diff options
context:
space:
mode:
authorStefan Reinauer <reinauer@chromium.org>2013-03-21 11:51:41 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-22 00:00:09 +0100
commit24d1d4b47274eb82893e6726472a991a36fce0aa (patch)
tree57126316330f6f9d407f605fa831ce530650f069 /src/southbridge/amd/sb700
parent55ed3106556a9bcbe36d3389dc5230d4a4ee2a40 (diff)
x86: Unify arch/io.h and arch/romcc_io.h
Here's the great news: From now on you don't have to worry about hitting the right io.h include anymore. Just forget about romcc_io.h and use io.h instead. This cleanup has a number of advantages, like you don't have to guard device/ includes for SMM and pre RAM anymore. This allows to get rid of a number of ifdefs and will generally make the code more readable and understandable. Potentially in the future some of the code in the io.h __PRE_RAM__ path should move to device.h or other device/ includes instead, but that's another incremental change. Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2872 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/amd/sb700')
-rw-r--r--src/southbridge/amd/sb700/bootblock.c1
-rw-r--r--src/southbridge/amd/sb700/early_setup.c2
-rw-r--r--src/southbridge/amd/sb700/enable_usbdebug.c1
-rw-r--r--src/southbridge/amd/sb700/reset.c8
4 files changed, 5 insertions, 7 deletions
diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c
index cffa5ca1da..c290806911 100644
--- a/src/southbridge/amd/sb700/bootblock.c
+++ b/src/southbridge/amd/sb700/bootblock.c
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <arch/io.h>
-#include <arch/romcc_io.h>
#include <device/pci_ids.h>
/*
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index bc6f9107d0..a16fc9f2b2 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -23,7 +23,6 @@
#include <stdint.h>
#include <arch/cpu.h>
#include <arch/io.h>
-#include <arch/romcc_io.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
@@ -33,7 +32,6 @@
#include "sb700.h"
#include "smbus.h"
-
static void pmio_write(u8 reg, u8 value)
{
outb(reg, PM_INDEX);
diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c
index a816253439..2a7fc383e4 100644
--- a/src/southbridge/amd/sb700/enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/enable_usbdebug.c
@@ -20,7 +20,6 @@
#include <stdint.h>
#include <arch/io.h>
-#include <arch/romcc_io.h>
#include <usbdebug.h>
#include <device/pci_def.h>
#include "sb700.h"
diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c
index 9203b2bede..ef4115ecbe 100644
--- a/src/southbridge/amd/sb700/reset.c
+++ b/src/southbridge/amd/sb700/reset.c
@@ -17,9 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <reset.h> /* hard_reset, soft_rest*/
-#include <arch/io.h> /* inb, outb */
-#include <arch/romcc_io.h> /* pci_read_config32, device_t, PCI_DEV */
+#ifndef __PRE_RAM__
+#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#endif
+#include <arch/io.h>
+#include <reset.h>
#define HT_INIT_CONTROL 0x6C
#define HTIC_BIOSR_Detect (1<<5)