diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-01-09 16:31:14 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-10 03:13:17 +0000 |
| commit | 7d1a948fbb0b9b4d5ebc6c06aed272f83c0718c5 (patch) | |
| tree | 0564fe7ffb04dbeae0b29fc559dede1fdf967f53 /src/southbridge/amd/sb700 | |
| parent | e8b5c31f2c7a49a677c1f82d82d81111c5294f03 (diff) | |
sb/amd/{cimx,sb{7,8}00}: Use PCI_DEVFN()
Change-Id: I731fd4ecfab679cd3d830a89bc82c56cf9008bc4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/sb700')
| -rw-r--r-- | src/southbridge/amd/sb700/sb700.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/southbridge/amd/sb700/sb700.c b/src/southbridge/amd/sb700/sb700.c index b7ff58d90c..8929f3fdfc 100644 --- a/src/southbridge/amd/sb700/sb700.c +++ b/src/southbridge/amd/sb700/sb700.c @@ -167,53 +167,53 @@ void sb7xx_51xx_enable(struct device *dev) return; switch (dev->path.pci.devfn - (devfn - (0x14 << 3))) { - case (0x11 << 3) | 0: + case PCI_DEVFN(0x11, 0): index = 8; set_sm_enable_bits(sm_dev, 0xac, 1 << index, (dev->enabled ? 1 : 0) << index); index += 32 * 3; break; - case (0x12 << 3) | 0: - case (0x12 << 3) | 1: - case (0x12 << 3) | 2: + case PCI_DEVFN(0x12, 0): + case PCI_DEVFN(0x12, 1): + case PCI_DEVFN(0x12, 2): index = dev->path.pci.devfn & 3; set_sm_enable_bits(sm_dev, 0x68, 1 << index, (dev->enabled ? 1 : 0) << index); index += 32 * 2; break; - case (0x13 << 3) | 0: - case (0x13 << 3) | 1: - case (0x13 << 3) | 2: + case PCI_DEVFN(0x13, 0): + case PCI_DEVFN(0x13, 1): + case PCI_DEVFN(0x13, 2): index = (dev->path.pci.devfn & 3) + 4; set_sm_enable_bits(sm_dev, 0x68, 1 << index, (dev->enabled ? 1 : 0) << index); index += 32 * 2; break; - case (0x14 << 3) | 5: + case PCI_DEVFN(0x14, 5): index = 7; set_sm_enable_bits(sm_dev, 0x68, 1 << index, (dev->enabled ? 1 : 0) << index); index += 32 * 2; break; - case (0x14 << 3) | 0: + case PCI_DEVFN(0x14, 0): index = 0; break; - case (0x14 << 3) | 1: + case PCI_DEVFN(0x14, 1): index = 1; break; - case (0x14 << 3) | 2: + case PCI_DEVFN(0x14, 2): index = 3; set_pmio_enable_bits(sm_dev, 0x59, 1 << index, (dev->enabled ? 1 : 0) << index); index += 32 * 4; break; - case (0x14 << 3) | 3: + case PCI_DEVFN(0x14, 3): index = 20; set_sm_enable_bits(sm_dev, 0x64, 1 << index, (dev->enabled ? 1 : 0) << index); index += 32 * 1; break; - case (0x14 << 3) | 4: + case PCI_DEVFN(0x14, 4): index = 4; break; default: |