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| author | Duncan Laurie <dlaurie@chromium.org> | 2016-09-19 12:02:54 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2016-09-19 19:03:34 -0700 |
| commit | 5e3dad66227bba4be9365ee76d00231bb5577b56 (patch) | |
| tree | d37e1d608326d34fbc9fd85f514cbbd437323a77 /src/southbridge/amd/sb700 | |
| parent | 884dfe632940b940df68d09f997fa5cd25121def (diff) | |
soc/intel/apollolake: Initialize GPEs in bootblock
Initialize the GPEs from mainboard config in bootblock, so they
can be used in verstage to query latched interrupt status.
I still left it called in ramstage just to be sure that the
configuration was not overwritten in FSP stages.
Tested by reading and reporting GPE status in a loop in verstage
and manually triggering an interrupt on EC console.
BUG=chrome-os-partner:53336
Change-Id: I1af3e9ac1e5c59b9ebb5c6dd1599309c1f036581
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/southbridge/amd/sb700')
0 files changed, 0 insertions, 0 deletions