summaryrefslogtreecommitdiff
path: root/src/southbridge/amd/sb700/sb700.h
diff options
context:
space:
mode:
authorAntonello Dettori <dev@dettori.io>2016-09-03 10:45:33 +0200
committerMartin Roth <martinroth@google.com>2016-09-13 17:18:58 +0200
commit6cf441523a216cecea1eb535382fc86e5ad923f9 (patch)
treecf4cb1afeecc16b168fe83129e86487fde6ae195 /src/southbridge/amd/sb700/sb700.h
parentc6557d0807ddf616ceb84954639e39b840f2243a (diff)
southbridge/amd/sb700: transition away from device_t
Replace the use of the old device_t definition inside southbridge/amd/sb700. Change-Id: I44b0be2070719066dd18bbf2882c417caef5d8b2 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16479 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/sb700/sb700.h')
-rw-r--r--src/southbridge/amd/sb700/sb700.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
index f23956cb5a..191dff116d 100644
--- a/src/southbridge/amd/sb700/sb700.h
+++ b/src/southbridge/amd/sb700/sb700.h
@@ -42,7 +42,9 @@ extern void pm_iowrite(u8 reg, u8 value);
extern u8 pm_ioread(u8 reg);
extern void pm2_iowrite(u8 reg, u8 value);
extern u8 pm2_ioread(u8 reg);
+#ifndef __SIMPLE_DEVICE__
extern void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val);
+#endif
#define REV_SB700_A11 0x11
#define REV_SB700_A12 0x12
@@ -56,7 +58,9 @@ extern void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val);
* The differentiate is 0x28, isn't it? */
#define get_sb700_revision(sm_dev) (pci_read_config8((sm_dev), 0x08) - 0x28)
+#ifndef __SIMPLE_DEVICE__
void sb7xx_51xx_enable(device_t dev);
+#endif
#ifdef __PRE_RAM__
void sb7xx_51xx_lpc_port80(void);