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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-02-23 18:42:55 +0200
committerMarc Jones <marcj303@gmail.com>2012-02-29 01:42:31 +0100
commit399fcdd40d24e7f6fed80e5e1493c900be2b3772 (patch)
treec3a69aad29feede21fb0fb48687d613a88a6d437 /src/southbridge/amd/sb700/sata.c
parent72bf6a1a48cb37497c112673dd17cd9c2c5971b1 (diff)
AMD southbridge: remove sp5100
Southbridge SP5100 support was compiled with SB700 code, but static device info structure would use sp5100/chip.h. To solve this drop support for separate chip sp5100 and adjust the relevant Kconfig options. Removes chip directory: src/southbridge/amd/sp5100/ Rename Kconfig option from: SOUTHBRIDGE_AMD_SP5100 to: SOUTHBRIDGE_AMD_SUBTYPE_SP5100 Change-Id: I873c6ad3624ee69165da6ab7287dfb7e006ee8e8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/679 Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao <zheng.bao@amd.com> Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/southbridge/amd/sb700/sata.c')
-rw-r--r--src/southbridge/amd/sb700/sata.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c
index 58b72ad538..bdbb08a645 100644
--- a/src/southbridge/amd/sb700/sata.c
+++ b/src/southbridge/amd/sb700/sata.c
@@ -86,9 +86,6 @@ static void sata_init(struct device *dev)
u16 sata_bar0, sata_bar1, sata_bar2, sata_bar3, sata_bar4;
int i, j;
- struct southbridge_ati_sb700_config *conf;
- conf = dev->chip_info;
-
device_t sm_dev;
/* SATA SMBus Disable */
sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
@@ -189,7 +186,7 @@ static void sata_init(struct device *dev)
byte |= 7 << 0;
pci_write_config8(dev, 0x4, byte);
-#if CONFIG_SOUTHBRIDGE_AMD_SP5100
+#if CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100
/* Master Latency Timer */
pci_write_config32(dev, 0xC, 0x00004000);
#endif