diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-09 18:09:50 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-11 01:56:35 +0100 |
| commit | 5d7dc5545dc51152abada7677073ab1e8ee97960 (patch) | |
| tree | 1ef4a49ba57d1e444a8d15e800bb62039a4cd4ef /src/southbridge/amd/sb700/ide.c | |
| parent | 45ded7df0317d2c898ed68e308f63d569e545658 (diff) | |
southbridge/amd/sb700: Add AHCI support
Change-Id: I147284e6a435f4b96d6821a122c1f4f9ddc2ea33
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11981
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/sb700/ide.c')
| -rw-r--r-- | src/southbridge/amd/sb700/ide.c | 42 |
1 files changed, 25 insertions, 17 deletions
diff --git a/src/southbridge/amd/sb700/ide.c b/src/southbridge/amd/sb700/ide.c index 89d7cdf913..5a5532dfc5 100644 --- a/src/southbridge/amd/sb700/ide.c +++ b/src/southbridge/amd/sb700/ide.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * Copyright (C) 2010 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify @@ -18,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <option.h> #include "sb700.h" static void ide_init(struct device *dev) @@ -26,6 +28,12 @@ static void ide_init(struct device *dev) /* Enable ide devices so the linux ide driver will work */ u32 dword; u8 byte; + uint8_t nvram; + uint8_t sata_ahci_mode; + + sata_ahci_mode = 0; + if (get_option(&nvram, "sata_ahci_mode") == CB_SUCCESS) + sata_ahci_mode = !!nvram; conf = dev->chip_info; @@ -35,25 +43,25 @@ static void ide_init(struct device *dev) dword &= ~(1 << 16); pci_write_config32(dev, 0x70, dword); - /* Enable UDMA on all devices, it will become UDMA0 (default PIO is PIO0) */ - byte = pci_read_config8(dev, 0x54); - byte |= 0xf; - pci_write_config8(dev, 0x54, byte); - - /* Enable I/O Access&& Bus Master */ - dword = pci_read_config16(dev, 0x4); - dword |= 1 << 2; - pci_write_config16(dev, 0x4, dword); - - /* set ide as primary, if you want to boot from IDE, you'd better set it - * in $vendor/$mainboard/devicetree.cb */ + if (!sata_ahci_mode) { + /* Enable UDMA on all devices, it will become UDMA0 (default PIO is PIO0) */ + byte = pci_read_config8(dev, 0x54); + byte |= 0xf; + pci_write_config8(dev, 0x54, byte); + /* Enable I/O Access&& Bus Master */ + dword = pci_read_config16(dev, 0x4); + dword |= 1 << 2; + pci_write_config16(dev, 0x4, dword); - if (conf->boot_switch_sata_ide == 1) { - struct device *sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); - byte = pci_read_config8(sm_dev, 0xAD); - byte |= 1 << 4; - pci_write_config8(sm_dev, 0xAD, byte); + /* set ide as primary, if you want to boot from IDE, you'd better set it + * in $vendor/$mainboard/devicetree.cb */ + if (conf->boot_switch_sata_ide == 1) { + struct device *sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + byte = pci_read_config8(sm_dev, 0xad); + byte |= 1 << 4; + pci_write_config8(sm_dev, 0xad, byte); + } } } |