diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2008-10-21 16:27:38 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2008-10-21 16:27:38 +0000 |
| commit | 039255c59c11863e00a64c47c487fe59c5c12097 (patch) | |
| tree | 90c2e40abef898a3bf50852a031e0734bf00e9cb /src/southbridge/amd/sb600/sb600.c | |
| parent | 657a6dc390871721711c2becc8501d05095891e5 (diff) | |
I/O ports are 16bit, so change 'unsigned long port_base' to 'u16 port_base'.
Also, use more readable #defines instead of hardcoded config ports for
PM/PM2 related functions, and simplify them a bit.
Build-tested with the AMD dbm690t target.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/sb600/sb600.c')
| -rw-r--r-- | src/southbridge/amd/sb600/sb600.c | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/src/southbridge/amd/sb600/sb600.c b/src/southbridge/amd/sb600/sb600.c index b1b17f0022..ef941ddb01 100644 --- a/src/southbridge/amd/sb600/sb600.c +++ b/src/southbridge/amd/sb600/sb600.c @@ -60,13 +60,13 @@ void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val) } } -static void pmio_write_index(unsigned long port_base, u8 reg, u8 value) +static void pmio_write_index(u16 port_base, u8 reg, u8 value) { outb(reg, port_base); outb(value, port_base + 1); } -static u8 pmio_read_index(unsigned long port_base, u8 reg) +static u8 pmio_read_index(u16 port_base, u8 reg) { outb(reg, port_base); return inb(port_base + 1); @@ -74,26 +74,22 @@ static u8 pmio_read_index(unsigned long port_base, u8 reg) void pm_iowrite(u8 reg, u8 value) { - unsigned long port_base = 0xcd6; - pmio_write_index(port_base, reg, value); + pmio_write_index(PM_INDEX, reg, value); } u8 pm_ioread(u8 reg) { - unsigned long port_base = 0xcd6; - return pmio_read_index(port_base, reg); + return pmio_read_index(PM_INDEX, reg); } void pm2_iowrite(u8 reg, u8 value) { - unsigned long port_base = 0xcd0; - pmio_write_index(port_base, reg, value); + pmio_write_index(PM2_INDEX, reg, value); } u8 pm2_ioread(u8 reg) { - unsigned long port_base = 0xcd0; - return pmio_read_index(port_base, reg); + return pmio_read_index(PM2_INDEX, reg); } static void set_pmio_enable_bits(device_t sm_dev, u32 reg_pos, |