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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-08-14 15:20:42 -0500
committerMartin Roth <martinroth@google.com>2015-12-18 19:51:44 +0100
commit1eaaa0e446b88e0ad60c4b6f68a022a9184f1df8 (patch)
tree05ec93f8500e92ee6f0bed893e2e994957ed8173 /src/southbridge/amd/rs780
parent5f2bf6d02ddb82887a17c0b48ce8eb3a300f9c09 (diff)
southbridge/amd/sr5650: Add MCFG ACPI table support
As the southbridge largely controls the PCI[e] configuration space this patch moves the resource allocation from the northbridge to the southbridge when the extended configuration space region is enabled. Change-Id: I0c4ba74ddcc727cd92b848d5d3240e6f9f392101 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12050 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/southbridge/amd/rs780')
-rw-r--r--src/southbridge/amd/rs780/rs780.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index c82a629436..6eb42958a1 100644
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -349,6 +350,17 @@ void rs780_enable(device_t dev)
}
}
+#if !IS_ENABLED(CONFIG_AMD_SB_CIMX)
+unsigned long acpi_fill_mcfg(unsigned long current)
+{
+ /* FIXME
+ * Leave table blank until proper contents
+ * are determined.
+ */
+ return current;
+}
+#endif
+
struct chip_operations southbridge_amd_rs780_ops = {
CHIP_NAME("ATI RS780")
.enable_dev = rs780_enable,