diff options
author | Zheng Bao <zheng.bao@amd.com> | 2010-03-23 06:46:01 +0000 |
---|---|---|
committer | Zheng Bao <Zheng.Bao@amd.com> | 2010-03-23 06:46:01 +0000 |
commit | b63bdbe29bd8bbc4756369792cc271ef6efa5e34 (patch) | |
tree | 9ca6203ce30515cb54aab7b1b6d44f06ded2a4f3 /src/southbridge/amd/rs780/rs780.c | |
parent | c8c09bb23942762ab9bc5e645b696bbad631628f (diff) |
Remove the building warnings.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5272 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs780/rs780.c')
-rw-r--r-- | src/southbridge/amd/rs780/rs780.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c index 471603f865..3d23a453cd 100644 --- a/src/southbridge/amd/rs780/rs780.c +++ b/src/southbridge/amd/rs780/rs780.c @@ -107,12 +107,12 @@ void static rs780_config_misc_clk(device_t nb_dev) set_htiu_enable_bits(nb_dev, 0x05, 7 << 8, 7 << 8); } -u32 get_vid_did(device_t dev) +static u32 get_vid_did(device_t dev) { return pci_read_config32(dev, 0); } -void rs780_nb_pci_table(device_t nb_dev) +static void rs780_nb_pci_table(device_t nb_dev) { /* NBPOR_InitPOR function. */ u8 temp8; u16 temp16; @@ -191,7 +191,7 @@ void rs780_nb_pci_table(device_t nb_dev) #endif } -void rs780_nb_gfx_dev_table(device_t nb_dev, device_t dev) +static void rs780_nb_gfx_dev_table(device_t nb_dev, device_t dev) { /* NB_InitGFXStraps */ u32 MMIOBase, apc04, apc18, apc24; @@ -214,27 +214,27 @@ void rs780_nb_gfx_dev_table(device_t nb_dev, device_t dev) pci_write_config8(dev, 0x04, 0x02); /* Program Straps. */ - strap = MMIOBase + 0x15020; + strap = (volatile u32 *)(MMIOBase + 0x15020); #if (CONFIG_GFXUMA == 1) *strap = 1<<7; /* the format of BIF_MEM_AP_SIZE. 001->256MB? */ #else *strap = 0; /* 128M SP memory, 000 -> 128MB */ #endif - strap = MMIOBase + 0x15000; + strap = (volatile u32 *)(MMIOBase + 0x15000); *strap = 0x2c006300; - strap = MMIOBase + 0x15010; + strap = (volatile u32 *)(MMIOBase + 0x15010); *strap = 0x03015330; - //strap = MMIOBase + 0x15020; + //strap = (volatile u32 *)(MMIOBase + 0x15020); //*strap |= 0x00000040; /* Disable HDA device. */ - strap = MMIOBase + 0x15030; + strap = (volatile u32 *)(MMIOBase + 0x15030); *strap = 0x00001002; - strap = MMIOBase + 0x15040; + strap = (volatile u32 *)(MMIOBase + 0x15040); *strap = 0x00000000; - strap = MMIOBase + 0x15050; + strap = (volatile u32 *)(MMIOBase + 0x15050); *strap = 0x00000000; - strap = MMIOBase + 0x15220; + strap = (volatile u32 *)(MMIOBase + 0x15220); *strap = 0x03c03800; - strap = MMIOBase + 0x15060; + strap = (volatile u32 *)(MMIOBase + 0x15060); *strap = 0x00000000; /* BIF switches into normal functional mode. */ |