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authorMartin Roth <martinroth@google.com>2017-06-24 21:30:14 -0600
committerMartin Roth <martinroth@google.com>2017-06-30 03:44:59 +0000
commit083504b66b5f3b281221f0a8f4fd62a4d9071287 (patch)
treedcf6fcb31f5d7ee760634c86b0fc06a7383e6d94 /src/southbridge/amd/rs690
parent5f9c6734fc9bbe69c007c46c8ec6f314bd5522a8 (diff)
southbridge/amd: add IS_ENABLED() around Kconfig symbol references
Change-Id: I8fabb7331435eb518a5c95cb29c4ff5ca98560d2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/rs690')
-rw-r--r--src/southbridge/amd/rs690/cmn.c2
-rw-r--r--src/southbridge/amd/rs690/ht.c8
2 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/rs690/cmn.c b/src/southbridge/amd/rs690/cmn.c
index 2ca92c3d03..7ef9ac079d 100644
--- a/src/southbridge/amd/rs690/cmn.c
+++ b/src/southbridge/amd/rs690/cmn.c
@@ -308,7 +308,7 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
void rs690_set_tom(device_t nb_dev)
{
/* set TOM */
-#if CONFIG_GFXUMA
+#if IS_ENABLED(CONFIG_GFXUMA)
pci_write_config32(nb_dev, 0x90, uma_memory_base);
nbmc_write_index(nb_dev, 0x1e, uma_memory_base);
#else
diff --git a/src/southbridge/amd/rs690/ht.c b/src/southbridge/amd/rs690/ht.c
index bbb33ef648..3c56a37739 100644
--- a/src/southbridge/amd/rs690/ht.c
+++ b/src/southbridge/amd/rs690/ht.c
@@ -24,7 +24,7 @@
static void ht_dev_set_resources(device_t dev)
{
-#if CONFIG_EXT_CONF_SUPPORT
+#if IS_ENABLED(CONFIG_EXT_CONF_SUPPORT)
unsigned reg;
device_t k8_f1;
resource_t rbase, rend;
@@ -83,7 +83,7 @@ static void ht_dev_set_resources(device_t dev)
unsigned long acpi_fill_mcfg(unsigned long current)
{
-#if CONFIG_EXT_CONF_SUPPORT
+#if IS_ENABLED(CONFIG_EXT_CONF_SUPPORT)
struct resource *res;
resource_t mmconf_base = EXT_CONF_BASE_ADDRESS; // default
@@ -100,7 +100,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
static void ht_dev_read_resources(device_t dev)
{
-#if CONFIG_EXT_CONF_SUPPORT
+#if IS_ENABLED(CONFIG_EXT_CONF_SUPPORT)
struct resource *res;
printk(BIOS_DEBUG,"%s %s\n", dev_path(dev), __func__);
@@ -109,7 +109,7 @@ static void ht_dev_read_resources(device_t dev)
pci_dev_read_resources(dev);
-#if CONFIG_EXT_CONF_SUPPORT
+#if IS_ENABLED(CONFIG_EXT_CONF_SUPPORT)
/* Add an MMCONFIG resource. */
res = new_resource(dev, 0x1C);
res->base = EXT_CONF_BASE_ADDRESS;