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authorStefan Reinauer <stepan@coresystems.de>2010-04-15 23:01:59 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-15 23:01:59 +0000
commite46c1c85c90b6d263f951ab745a9fadd93041111 (patch)
tree4ffefdc0767139b66c48732d44b8a3222eb6b09f /src/southbridge/amd/rs690
parentc24d383c15f6d31cd1dd5fb8e090db0561421599 (diff)
remove more warnings. move ROOT_COMPLEX selection to fam10
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs690')
-rw-r--r--src/southbridge/amd/rs690/rs690_gfx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/rs690/rs690_gfx.c b/src/southbridge/amd/rs690/rs690_gfx.c
index 887c38e8de..c55f2bc3d3 100644
--- a/src/southbridge/amd/rs690/rs690_gfx.c
+++ b/src/southbridge/amd/rs690/rs690_gfx.c
@@ -34,7 +34,7 @@
#define CLK_CNTL_INDEX 0x8
#define CLK_CNTL_DATA 0xC
-#if 0
+#ifdef UNUSED_CODE
static u32 clkind_read(device_t dev, u32 index)
{
u32 gfx_bar2 = pci_read_config32(dev, 0x18) & ~0xF;