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authorElyes HAOUAS <ehaouas@noos.fr>2016-08-31 19:22:16 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:22:46 +0200
commitba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch)
tree9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/amd/rs690/ht.c
parent2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff)
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16291 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/amd/rs690/ht.c')
-rw-r--r--src/southbridge/amd/rs690/ht.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/rs690/ht.c b/src/southbridge/amd/rs690/ht.c
index f4bdf99097..bbb33ef648 100644
--- a/src/southbridge/amd/rs690/ht.c
+++ b/src/southbridge/amd/rs690/ht.c
@@ -52,12 +52,12 @@ static void ht_dev_set_resources(device_t dev)
printk(BIOS_DEBUG,"%s: %s[0x1C] base = %0llx limit = %0llx\n", __func__, dev_path(dev), rbase, rend);
k8_f1 = dev_find_slot(0,PCI_DEVFN(0x18,1));
// find a not assigned resource
- for( reg = 0xb8; reg >= 0x80; reg -= 8 ) {
+ for ( reg = 0xb8; reg >= 0x80; reg -= 8 ) {
base = pci_read_config32(k8_f1,reg);
limit = pci_read_config32(k8_f1,reg+4);
- if( !(base & 3) ) break; // found a not assigned resource
+ if ( !(base & 3) ) break; // found a not assigned resource
}
- if( !(base & 3) ) {
+ if ( !(base & 3) ) {
u32 sblk;
device_t k8_f0 = dev_find_slot(0, PCI_DEVFN(0x18, 0));
/* Remember this resource has been stored. */
@@ -90,7 +90,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
device_t dev = dev_find_slot(0,PCI_DEVFN(0,0));
// we report mmconf base
res = probe_resource(dev, 0x1C);
- if( res )
+ if ( res )
mmconf_base = res->base;
current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, mmconf_base, 0x0, 0x0, 0x1f); // Fix me: should i reserve 255 busses ?