diff options
author | Martin Roth <martinroth@google.com> | 2017-06-24 21:30:14 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2017-06-30 03:44:59 +0000 |
commit | 083504b66b5f3b281221f0a8f4fd62a4d9071287 (patch) | |
tree | dcf6fcb31f5d7ee760634c86b0fc06a7383e6d94 /src/southbridge/amd/rs690/cmn.c | |
parent | 5f9c6734fc9bbe69c007c46c8ec6f314bd5522a8 (diff) |
southbridge/amd: add IS_ENABLED() around Kconfig symbol references
Change-Id: I8fabb7331435eb518a5c95cb29c4ff5ca98560d2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20349
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/rs690/cmn.c')
-rw-r--r-- | src/southbridge/amd/rs690/cmn.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/rs690/cmn.c b/src/southbridge/amd/rs690/cmn.c index 2ca92c3d03..7ef9ac079d 100644 --- a/src/southbridge/amd/rs690/cmn.c +++ b/src/southbridge/amd/rs690/cmn.c @@ -308,7 +308,7 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port) void rs690_set_tom(device_t nb_dev) { /* set TOM */ -#if CONFIG_GFXUMA +#if IS_ENABLED(CONFIG_GFXUMA) pci_write_config32(nb_dev, 0x90, uma_memory_base); nbmc_write_index(nb_dev, 0x1e, uma_memory_base); #else |