diff options
| author | Marc Jones <marcj303@gmail.com> | 2017-04-09 18:00:40 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-14 17:09:27 +0200 |
| commit | 3eec9dda1fa7aed3cd6a47232201c23303b3d686 (patch) | |
| tree | 1b31965f4baeb6eb786e7855aa7586e3c86e456d /src/southbridge/amd/pi | |
| parent | d7717860587bf57430eaf1d087cd1168b62fa6d5 (diff) | |
amd/pi/hudson: Add SERIRQ setup
Enable SERIRQ in quiet or continuous mode based on Kconfig.
Defaults to quite mode.
Change-Id: Ib40a84719fcc3a5d6b3000c3c0412f1bcf629609
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19234
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/pi')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/Kconfig | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/lpc.c | 7 |
2 files changed, 13 insertions, 0 deletions
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig index bb58722a21..233260f026 100644 --- a/src/southbridge/amd/pi/hudson/Kconfig +++ b/src/southbridge/amd/pi/hudson/Kconfig @@ -213,6 +213,12 @@ config AMDFW_OUTSIDE_CBFS option to manually attach the generated amdfw.rom at an offset of 0x20000 from the bottom of the coreboot ROM image. +config SERIRQ_CONTINUOUS_MODE + bool + default n + help + Set this option to y for serial IRQ in continuous mode. + Otherwise it is in quiet mode. endif config HUDSON_UART diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c index 1dacfd0dbd..38c57331b2 100644 --- a/src/southbridge/amd/pi/hudson/lpc.c +++ b/src/southbridge/amd/pi/hudson/lpc.c @@ -83,6 +83,13 @@ static void lpc_init(device_t dev) /* Initialize i8254 timers */ setup_i8254 (); + + /* Setup SERIRQ, enable continuous mode */ + byte = (BIT(4) | BIT(7)); + if (!IS_ENABLED(CONFIG_SERIRQ_CONTINUOUS_MODE)) + byte |= BIT(6); + + pm_write8(PM_SERIRQ_CONF, byte); } static void hudson_lpc_read_resources(device_t dev) |