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authorKevin Chiu <kevin.chiu.17802@gmail.com>2021-02-09 16:18:11 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-02-11 10:17:35 +0000
commit788eb99448fcda7fc4035299fb78d805136849d8 (patch)
tree95503271cc4ead2954afcd25067dcf32e04fc653 /src/southbridge/amd/pi/hudson
parentd510b60f5b4eee6c165039be4acbe89ff25d8a4a (diff)
mb/google/zork: modify ELAN TP i2c IRQ to LEVEL active for dirinboz
configure IRQs as level triggered to prevent TP lost. BUG=None BRANCH=zork TEST=1. emerge-zork coreboot chromeos-bootimage 2. power on, suspend DUT to check TP is functional Change-Id: I81ffa889fbdfb01bf3057a8258fb4dd4ad7e88d5 Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50420 Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/pi/hudson')
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