diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-07-08 12:41:56 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-09 09:31:54 +0000 |
| commit | 251279c537397835a4504165e7582cb29c19891c (patch) | |
| tree | a4d208e75433392f19b18b912ecf642b7a545ba4 /src/southbridge/amd/pi/hudson | |
| parent | 39303d5d4960814fc606cce3a9ec10545faaef4b (diff) | |
src/southbridge: Use "foo *bar" instead of "foo* bar"
Change-Id: I72d50615d77b91529810e8f590fa56f3c6f7546c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/pi/hudson')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/amd_pci_int_types.h | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/gpio.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/pi/hudson/amd_pci_int_types.h b/src/southbridge/amd/pi/hudson/amd_pci_int_types.h index f8989073ea..8061bf7349 100644 --- a/src/southbridge/amd/pi/hudson/amd_pci_int_types.h +++ b/src/southbridge/amd/pi/hudson/amd_pci_int_types.h @@ -16,7 +16,7 @@ #ifndef AMD_PCI_INT_TYPES_H #define AMD_PCI_INT_TYPES_H -const char * intr_types[] = { +const char *intr_types[] = { [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t", [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD", [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", "SD\t\t", diff --git a/src/southbridge/amd/pi/hudson/gpio.c b/src/southbridge/amd/pi/hudson/gpio.c index 5b2eb4c161..d3e5cfa063 100644 --- a/src/southbridge/amd/pi/hudson/gpio.c +++ b/src/southbridge/amd/pi/hudson/gpio.c @@ -22,7 +22,7 @@ int gpio_get(gpio_t gpio_num) { uint32_t reg; - reg = read32((void*)(uintptr_t)gpio_num); + reg = read32((void *)(uintptr_t)gpio_num); return !!(reg & GPIO_PIN_STS); } |