southbridge/amd/pi: Rename Avalon to Hudson

To maintain consistancy with southbridge/amd/agesa/hudson rename
pi/avalon to pi/hudson in advance of adding support for the
base hudson southbridge.

Change-Id: Icff8c4c06aae2d40cbd9e90903754735ac3510c3
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/8251
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

1 files changed, 65 insertions, 0 deletions

diff --git a/src/southbridge/amd/pi/hudson/smi.h b/src/southbridge/amd/pi/hudson/smi.h
new file mode 100644
index 0000000000..de987a9274
--- /dev/null
+++ b/src/southbridge/amd/pi/hudson/smi.h
@@ -0,0 +1,65 @@
+/*
+ * Utilities for SMI handlers and SMM setup
+ *
+ * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ * Subject to the GNU GPL v2, or (at your option) any later version.
+ */
+
+#ifndef _SOUTHBRIDGE_AMD_PI_HUDSON_SMI_H
+#define _SOUTHBRIDGE_AMD_PI_HUDSON_SMI_H
+
+#include <arch/io.h>
+
+/* ACPI_MMIO_BASE + 0x200 -- leave this string here so grep catches it.
+ * This is defined by AGESA, but we dpn't include AGESA headers to avoid
+ * polluting the namesace.
+ */
+#define SMI_BASE 0xfed80200
+
+#define SMI_REG_SMITRIG0	0x98
+#define SMITRG0_EOS		(1 << 28)
+#define SMITRG0_SMIENB		(1 << 31)
+
+#define SMI_REG_CONTROL0	0xa0
+
+enum smi_mode {
+	SMI_MODE_DISABLE = 0,
+	SMI_MODE_SMI = 1,
+	SMI_MODE_NMI = 2,
+	SMI_MODE_IRQ13 = 3,
+};
+
+enum smi_lvl {
+	SMI_LVL_LOW = 0,
+	SMI_LVL_HIGH = 1,
+};
+
+static inline uint32_t smi_read32(uint8_t offset)
+{
+	return read32(SMI_BASE + offset);
+}
+
+static inline void smi_write32(uint8_t offset, uint32_t value)
+{
+	write32(SMI_BASE + offset, value);
+}
+
+static inline uint16_t smi_read16(uint8_t offset)
+{
+	return read16(SMI_BASE + offset);
+}
+
+static inline void smi_write16(uint8_t offset, uint16_t value)
+{
+	write16(SMI_BASE + offset, value);
+}
+
+void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
+void hudson_disable_gevent_smi(uint8_t gevent);
+void hudson_enable_acpi_cmd_smi(void);
+
+#ifndef __SMM__
+void hudson_enable_smi_generation(void);
+#endif
+
+#endif /* _SOUTHBRIDGE_AMD_PI_HUDSON_SMI_H */