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authorMarc Jones <marcj303@gmail.com>2017-04-09 17:55:56 -0600
committerMartin Roth <martinroth@google.com>2017-04-14 17:09:09 +0200
commitd7717860587bf57430eaf1d087cd1168b62fa6d5 (patch)
tree1a89a5b071fc0fcbb43686e4329b090f8bc679cd /src/southbridge/amd/pi/hudson/hudson.h
parent127a79e0b6cc4d25560446efcccca8a8da15a9b4 (diff)
amd/pi/hudson: Add hudson PM register defines
Clean up hudson PM register accesses with some register defines. Change-Id: I5ccf27a2463350baec53b7c79fe0fd4ec6c31306 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19233 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/hudson.h')
-rw-r--r--src/southbridge/amd/pi/hudson/hudson.h19
1 files changed, 18 insertions, 1 deletions
diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h
index 6e3157dd14..6c08f2f1b4 100644
--- a/src/southbridge/amd/pi/hudson/hudson.h
+++ b/src/southbridge/amd/pi/hudson/hudson.h
@@ -22,6 +22,12 @@
#include <device/device.h>
#include "chip.h"
+/* Offsets from ACPI_MMIO_BASE
+ * This is defined by AGESA, but we don't include AGESA headers to avoid
+ * polluting the namespace.
+ */
+#define PM_MMIO_BASE 0xfed80300
+
/* Power management index/data registers */
#define BIOSRAM_INDEX 0xcd4
#define BIOSRAM_DATA 0xcd5
@@ -30,8 +36,19 @@
#define PM2_INDEX 0xcd0
#define PM2_DATA 0xcd1
-#define HUDSON_ACPI_IO_BASE 0x800
+#define PM_SERIRQ_CONF 0x54
+#define PM_EVT_BLK 0x60
+#define PM1_CNT_BLK 0x62
+#define PM_TMR_BLK 0x64
+#define PM_CPU_CTRL 0x66
+#define PM_GPE0_BLK 0x68
+#define PM_ACPI_SMI_CMD 0x6A
+#define PM_ACPI_CONF 0x74
+#define PM_MANUAL_RESET 0xD3
+#define PM_HUD_SD_FLASH_CTRL 0xE7
+#define PM_YANG_SD_FLASH_CTRL 0xE8
+#define HUDSON_ACPI_IO_BASE 0x800
#define ACPI_PM_EVT_BLK (HUDSON_ACPI_IO_BASE + 0x00) /* 4 bytes */
#define ACPI_PM1_CNT_BLK (HUDSON_ACPI_IO_BASE + 0x04) /* 2 bytes */
#define ACPI_PM_TMR_BLK (HUDSON_ACPI_IO_BASE + 0x18) /* 4 bytes */