diff options
| author | Zheng Bao <fishbaozi@gmail.com> | 2015-11-21 12:19:22 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-24 20:57:47 +0100 |
| commit | 22861385613e34a16ef745917f6956a92243d88b (patch) | |
| tree | 4994983a5acc00de8340ff9cb260bdf2cc3b66f7 /src/southbridge/amd/pi/hudson/early_setup.c | |
| parent | ab1e77fb01df5315fc291a801ca60db2582a111d (diff) | |
AMD/bettong: Add UART support
The function delay in uart8250mem.c is not enough for hudson. I guess
there are some problems in lapic_timer(). I uploaded a patch to gerrit
to show the way to enable UART feature.
http://review.coreboot.org/#/c/12343/4
Currently the HUDSON_UART is unchecked by default. Select HUDSON_UART to
enable this feature.
The UART is test at BIOS stage.
Since it is not a standart UART device, the windows internal UART driver
doesnt support it. I guess we need a driver to use it on windows.
Change-Id: I4cec833cc2ff8069c82886837f7cbd4483ff11bb
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/11749
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/early_setup.c')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/early_setup.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c index 14ffd8b82b..f4fcf8b472 100644 --- a/src/southbridge/amd/pi/hudson/early_setup.c +++ b/src/southbridge/amd/pi/hudson/early_setup.c @@ -26,6 +26,37 @@ #include "hudson.h" #include "pci_devs.h" +#if IS_ENABLED(CONFIG_HUDSON_UART) + +#include <cpu/x86/msr.h> +#include <delay.h> +#include <Fch/Fch.h> + +void configure_hudson_uart(void) +{ + msr_t msr; + u8 byte; + + msr = rdmsr(0x1B); + msr.lo |= 1 << 11; + wrmsr(0x1B, msr); + byte = read8((void *)ACPI_MMIO_BASE + AOAC_BASE + FCH_AOAC_REG56 + CONFIG_UART_FOR_CONSOLE * 2); + byte |= 1 << 3; + write8((void *)ACPI_MMIO_BASE + AOAC_BASE + FCH_AOAC_REG56 + CONFIG_UART_FOR_CONSOLE * 2, byte); + byte = read8((void *)ACPI_MMIO_BASE + AOAC_BASE + FCH_AOAC_REG62); + byte |= 1 << 3; + write8((void *)ACPI_MMIO_BASE + AOAC_BASE + FCH_AOAC_REG62, byte); + write8((void *)FCH_IOMUXx89_UART0_RTS_L_EGPIO137, 0); + write8((void *)FCH_IOMUXx8A_UART0_TXD_EGPIO138, 0); + write8((void *)FCH_IOMUXx8E_UART1_RTS_L_EGPIO142, 0); + write8((void *)FCH_IOMUXx8F_UART1_TXD_EGPIO143, 0); + + udelay(2000); + write8((void *)0xFEDC6000 + 0x2000 * CONFIG_UART_FOR_CONSOLE + 0x88, 0x01); /* reset UART */ +} + +#endif + void hudson_pci_port80(void) { u8 byte; |