diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-19 17:08:23 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-20 09:10:46 +0000 |
| commit | d9ef546269e04e4ba4a8b350cee78fa50e67fec3 (patch) | |
| tree | ee303f75364348ca8d1309acaa92a31a03c4a537 /src/southbridge/amd/pi/hudson/early_setup.c | |
| parent | 1a4abb73cdeae498e1470d273fee7cc1f35912e7 (diff) | |
sb/amd/pi/hudson: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: Iace820ad788fde7b230f63d95543470ce925b451
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26417
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/early_setup.c')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/early_setup.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c index ae8b406ad6..d95385be1e 100644 --- a/src/southbridge/amd/pi/hudson/early_setup.c +++ b/src/southbridge/amd/pi/hudson/early_setup.c @@ -276,7 +276,7 @@ void hudson_clk_output_48Mhz(void) static uintptr_t hudson_spibase(void) { /* Make sure the base address is predictable */ - device_t dev = PCI_DEV(0, 0x14, 3); + pci_devfn_t dev = PCI_DEV(0, 0x14, 3); u32 base = pci_read_config32(dev, SPIROM_BASE_ADDRESS_REGISTER) & 0xfffffff0; @@ -328,7 +328,7 @@ void hudson_read_mode(u32 mode) void hudson_tpm_decode_spi(void) { - device_t dev = PCI_DEV(0, 0x14, 3); /* LPC device */ + pci_devfn_t dev = PCI_DEV(0, 0x14, 3); /* LPC device */ u32 spibase = pci_read_config32(dev, SPIROM_BASE_ADDRESS_REGISTER); pci_write_config32(dev, SPIROM_BASE_ADDRESS_REGISTER, spibase |