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authorDave Frodin <dave.frodin@se-eng.com>2015-01-27 07:19:48 -0700
committerDave Frodin <dave.frodin@se-eng.com>2015-02-05 17:33:00 +0100
commit9cfa742a264442a8796120964b06fcc8e03185bf (patch)
tree311dea3a9bd784725a4a68992c6428346e926949 /src/southbridge/amd/pi/hudson/amd_pci_int_types.h
parentc3f6bb086beeaca831877813589dc298faaa5dbe (diff)
southbridge/amd/pi: Add the bolton definitions
This adds the PCI and interrupt related definitions for the bolton specific features. Change-Id: Ia6530c57ec5a4a5c4525bfbae0eb5db04c0bef9e Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/8286 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/amd_pci_int_types.h')
-rw-r--r--src/southbridge/amd/pi/hudson/amd_pci_int_types.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/amd/pi/hudson/amd_pci_int_types.h b/src/southbridge/amd/pi/hudson/amd_pci_int_types.h
index d0fe9c8094..517c8926c0 100644
--- a/src/southbridge/amd/pi/hudson/amd_pci_int_types.h
+++ b/src/southbridge/amd/pi/hudson/amd_pci_int_types.h
@@ -20,6 +20,17 @@
#ifndef AMD_PCI_INT_TYPES_H
#define AMD_PCI_INT_TYPES_H
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_BOLTON)
+const char * intr_types[] = {
+ [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
+ [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
+ [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "SD\t\t", "GEC\t", "PerMon\t",
+ [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t",
+ [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", "Dev20.5 INTC",
+ [0x40] = "IDE\t", "SATA\t",
+ [0x50] = "GPPInt0\t", "GPPInt1\t", "GPPInt2\t", "GPPInt3\t"
+};
+#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_AVALON)
const char * intr_types[] = {
[0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
[0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
@@ -29,5 +40,6 @@ const char * intr_types[] = {
[0x40] = "RSVD\t", "SATA\t",
[0x60] = "RSVD\t", "RSVD\t", "GPIO\t",
};
+#endif
#endif /* AMD_PCI_INT_TYPES_H */