diff options
| author | WANG Siyuan <wangsiyuanbuaa@gmail.com> | 2015-05-20 14:41:01 +0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-13 02:22:49 +0200 |
| commit | f2dfef01e1fdf9d8218f0bc6ecfc3f943dc4d2a1 (patch) | |
| tree | 3c0b66ab3395249ddfa4524ebc80bdf3007acc89 /src/southbridge/amd/pi/hudson/amd_pci_int_defs.h | |
| parent | 597ee56261c75c4e621a83e5999bc84e772ed53f (diff) | |
southbridge/amd/pi: Add support for new AMD southbridge Kern
Kern is the southbridge of AMD Merlin Falcon(Carrizo).
This add support of HD audio, lpc, sata and usb for Kern.
Change-Id: Ie47e38bc1099cdb72002619cb1da269f3739678b
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Reviewed-on: http://review.coreboot.org/10418
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/amd_pci_int_defs.h')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/amd_pci_int_defs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/amd/pi/hudson/amd_pci_int_defs.h b/src/southbridge/amd/pi/hudson/amd_pci_int_defs.h index 2ca91477df..a1e5e077c7 100644 --- a/src/southbridge/amd/pi/hudson/amd_pci_int_defs.h +++ b/src/southbridge/amd/pi/hudson/amd_pci_int_defs.h @@ -80,4 +80,9 @@ #define PIRQ_GPP3 0x53 /* GPP INT 3 */ #endif +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_KERN) +#define FCH_INT_TABLE_SIZE 0x75 +#define PIRQ_GPIO 0x62 /* GPIO Controller Interrupt */ +#endif + #endif /* AMD_PCI_INT_DEFS_H */ |