diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-07 14:36:16 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-07 14:36:16 +0000 |
| commit | 31f81a6de1515df2eebcf6e1b1afd545fc7a2714 (patch) | |
| tree | 3ab6e3da26b92933db7a5625c5df46845270415e /src/southbridge/amd/cs5530/cs5530.h | |
| parent | fdfaada706037287c74e2541a6151f16d93b9be1 (diff) | |
Enable full ROM access on AMD CS5530(A) (needed for CBFS).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5530/cs5530.h')
| -rw-r--r-- | src/southbridge/amd/cs5530/cs5530.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/amd/cs5530/cs5530.h b/src/southbridge/amd/cs5530/cs5530.h index df4f66bae0..107b6f26e5 100644 --- a/src/southbridge/amd/cs5530/cs5530.h +++ b/src/southbridge/amd/cs5530/cs5530.h @@ -27,6 +27,12 @@ void cs5530_enable(device_t dev); #endif #define DECODE_CONTROL_REG2 0x5b /* F0 index 0x5b */ +#define ROM_AT_LOGIC_CONTROL_REG 0x52 /* F0 index 0x52 */ + +#define LOWER_ROM_ADDRESS_RANGE (1 << 0) +#define ROM_WRITE_ENABLE (1 << 1) +#define UPPER_ROM_ADDRESS_RANGE (1 << 2) +#define BIOS_ROM_POSITIVE_DECODE (1 << 5) /* Selects PCI positive decoding for accesses to the configured ROM space. */ #define BIOS_ROM_POSITIVE_DECODE (1 << 5) |