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authorarch import user (historical) <svn@openbios.org>2005-07-06 17:06:46 +0000
committerarch import user (historical) <svn@openbios.org>2005-07-06 17:06:46 +0000
commitd24d6993b6d7bcf7977d74d081e718e1b076d1b0 (patch)
treea699baad12aa9f044a10fac2658cd730c5891886 /src/southbridge/amd/cs5530/chip.h
parent4e83d70a4393674ac3b54d1343533fc1d2c489d0 (diff)
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-26
Creator: Hamish Guthrie <hamish@prodigi.ch> Added AMD GX1 northbridge and cs5530 Southbridge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5530/chip.h')
-rw-r--r--src/southbridge/amd/cs5530/chip.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/amd/cs5530/chip.h b/src/southbridge/amd/cs5530/chip.h
new file mode 100644
index 0000000000..ed891b2acc
--- /dev/null
+++ b/src/southbridge/amd/cs5530/chip.h
@@ -0,0 +1,12 @@
+#ifndef _SOUTHBRIDGE_AMD_CS5530
+#define _SOUTHBRIDGE_AMD_CS5530
+
+extern struct chip_operations southbridge_amd_cs5530_ops;
+
+struct southbridge_amd_cs5530_config {
+ /* PCI function enables so the pci scan bus finds the devices */
+ int enable_ide;
+ int enable_nvram;
+};
+
+#endif /* _SOUTHBRIDGE_AMD_CS5530 */