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authorFelix Held <felix-coreboot@felixheld.de>2015-05-31 20:28:17 +0200
committerMartin Roth <martinroth@google.com>2015-11-20 16:35:47 +0100
commitd2e8f6ad33c750853844c5674d1a1a926ad7d93a (patch)
treefde712f291c184ad279f9c1f4634b49d07eac867 /src/southbridge/amd/common
parente536a4d91697fc49d865dfa5065d2cbb31cbc03f (diff)
southbridge/amd: add support for Bolton FCH
The Bolton FCH needs different firmware files than the Hudson FCH. A small patch to vendorcode is probably needed to make the XHCI controller work. XHCI_DEVID in pci_devs.h is probably wrong for Hudson. Change-Id: Ib81c0881979edcde717217dc89d8af415520d7e5 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/9623 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/common')
-rw-r--r--src/southbridge/amd/common/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/amd/common/Makefile.inc b/src/southbridge/amd/common/Makefile.inc
index 50adf7b5fa..107b2f66b4 100644
--- a/src/southbridge/amd/common/Makefile.inc
+++ b/src/southbridge/amd/common/Makefile.inc
@@ -1,6 +1,7 @@
ramstage-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700) += amd_pci_util.c
ramstage-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800) += amd_pci_util.c
ramstage-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900) += amd_pci_util.c
+ramstage-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_BOLTON) += amd_pci_util.c
ramstage-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += amd_pci_util.c
ramstage-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += amd_pci_util.c
ramstage-$(CONFIG_SOUTHBRIDGE_AMD_PI_AVALON) += amd_pci_util.c