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authorElyes HAOUAS <ehaouas@noos.fr>2018-07-08 12:41:56 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-09 09:31:54 +0000
commit251279c537397835a4504165e7582cb29c19891c (patch)
treea4d208e75433392f19b18b912ecf642b7a545ba4 /src/southbridge/amd/cimx
parent39303d5d4960814fc606cce3a9ec10545faaef4b (diff)
src/southbridge: Use "foo *bar" instead of "foo* bar"
Change-Id: I72d50615d77b91529810e8f590fa56f3c6f7546c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r--src/southbridge/amd/cimx/sb800/Amd.h7
-rw-r--r--src/southbridge/amd/cimx/sb800/AmdSbLib.h2
-rw-r--r--src/southbridge/amd/cimx/sb800/amd_pci_int_types.h2
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c2
-rw-r--r--src/southbridge/amd/cimx/sb900/Amd.h7
-rw-r--r--src/southbridge/amd/cimx/sb900/AmdSbLib.h2
-rw-r--r--src/southbridge/amd/cimx/sb900/amd_pci_int_types.h2
-rw-r--r--src/southbridge/amd/cimx/sb900/late.c2
8 files changed, 14 insertions, 12 deletions
diff --git a/src/southbridge/amd/cimx/sb800/Amd.h b/src/southbridge/amd/cimx/sb800/Amd.h
index 42e2b3ad8f..066c4a3e9f 100644
--- a/src/southbridge/amd/cimx/sb800/Amd.h
+++ b/src/southbridge/amd/cimx/sb800/Amd.h
@@ -61,9 +61,10 @@ typedef unsigned int AGESA_STATUS;
#define AGESA_CRITICAL ((AGESA_STATUS) 0xC0000002)
#define AGESA_FATAL ((AGESA_STATUS) 0xC0000003)
-typedef AGESA_STATUS (*CALLOUT_ENTRY) (unsigned int Param1, unsigned int Param2, void* ConfigPtr);
-typedef AGESA_STATUS (*IMAGE_ENTRY) (IN OUT void* ConfigPtr);
-typedef AGESA_STATUS (*MODULE_ENTRY) (IN OUT void* ConfigPtr);
+typedef AGESA_STATUS(*CALLOUT_ENTRY) (unsigned int Param1, unsigned int Param2,
+ void *ConfigPtr);
+typedef AGESA_STATUS(*IMAGE_ENTRY) (IN OUT void *ConfigPtr);
+typedef AGESA_STATUS(*MODULE_ENTRY) (IN OUT void *ConfigPtr);
///This allocation type is used by the AmdCreateStruct entry point
typedef enum {
diff --git a/src/southbridge/amd/cimx/sb800/AmdSbLib.h b/src/southbridge/amd/cimx/sb800/AmdSbLib.h
index c13eda4e58..10a88f2a47 100644
--- a/src/southbridge/amd/cimx/sb800/AmdSbLib.h
+++ b/src/southbridge/amd/cimx/sb800/AmdSbLib.h
@@ -28,7 +28,7 @@
#define NUM_IMAGE_LOCATION 32
//Entry Point Call
-typedef void (*CIM_IMAGE_ENTRY) (void* pConfig);
+typedef void (*CIM_IMAGE_ENTRY) (void *pConfig);
//Hook Call
diff --git a/src/southbridge/amd/cimx/sb800/amd_pci_int_types.h b/src/southbridge/amd/cimx/sb800/amd_pci_int_types.h
index 854f9c3245..300969ddde 100644
--- a/src/southbridge/amd/cimx/sb800/amd_pci_int_types.h
+++ b/src/southbridge/amd/cimx/sb800/amd_pci_int_types.h
@@ -16,7 +16,7 @@
#ifndef AMD_PCI_INT_TYPES_H
#define AMD_PCI_INT_TYPES_H
-const char * intr_types[] = {
+const char *intr_types[] = {
[0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
[0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
[0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t",
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 29a1336f13..60d40f7049 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -50,7 +50,7 @@ static AMDSBCFG *sb_config = &sb_late_cfg;
* @param[in] config Southbridge configuration structure pointer.
*
*/
-static u32 sb800_callout_entry(u32 func, u32 data, void* config)
+static u32 sb800_callout_entry(u32 func, u32 data, void *config)
{
u32 ret = 0;
printk(BIOS_DEBUG, "SB800 - Late.c - %s - Start.\n", __func__);
diff --git a/src/southbridge/amd/cimx/sb900/Amd.h b/src/southbridge/amd/cimx/sb900/Amd.h
index ec8140060f..c765b3371b 100644
--- a/src/southbridge/amd/cimx/sb900/Amd.h
+++ b/src/southbridge/amd/cimx/sb900/Amd.h
@@ -61,9 +61,10 @@ typedef unsigned int AGESA_STATUS;
#define AGESA_CRITICAL ((AGESA_STATUS) 0xC0000002)
#define AGESA_FATAL ((AGESA_STATUS) 0xC0000003)
-typedef AGESA_STATUS (*CALLOUT_ENTRY) (unsigned int Param1, unsigned int Param2, void* ConfigPtr);
-typedef AGESA_STATUS (*IMAGE_ENTRY) (IN OUT void* ConfigPtr);
-typedef AGESA_STATUS (*MODULE_ENTRY) (IN OUT void* ConfigPtr);
+typedef AGESA_STATUS(*CALLOUT_ENTRY) (unsigned int Param1, unsigned int Param2,
+ void *ConfigPtr);
+typedef AGESA_STATUS(*IMAGE_ENTRY) (IN OUT void *ConfigPtr);
+typedef AGESA_STATUS(*MODULE_ENTRY) (IN OUT void *ConfigPtr);
///This allocation type is used by the AmdCreateStruct entry point
typedef enum {
diff --git a/src/southbridge/amd/cimx/sb900/AmdSbLib.h b/src/southbridge/amd/cimx/sb900/AmdSbLib.h
index c13eda4e58..10a88f2a47 100644
--- a/src/southbridge/amd/cimx/sb900/AmdSbLib.h
+++ b/src/southbridge/amd/cimx/sb900/AmdSbLib.h
@@ -28,7 +28,7 @@
#define NUM_IMAGE_LOCATION 32
//Entry Point Call
-typedef void (*CIM_IMAGE_ENTRY) (void* pConfig);
+typedef void (*CIM_IMAGE_ENTRY) (void *pConfig);
//Hook Call
diff --git a/src/southbridge/amd/cimx/sb900/amd_pci_int_types.h b/src/southbridge/amd/cimx/sb900/amd_pci_int_types.h
index 854f9c3245..300969ddde 100644
--- a/src/southbridge/amd/cimx/sb900/amd_pci_int_types.h
+++ b/src/southbridge/amd/cimx/sb900/amd_pci_int_types.h
@@ -16,7 +16,7 @@
#ifndef AMD_PCI_INT_TYPES_H
#define AMD_PCI_INT_TYPES_H
-const char * intr_types[] = {
+const char *intr_types[] = {
[0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
[0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
[0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t",
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c
index 158e3f4a1e..9a2f837010 100644
--- a/src/southbridge/amd/cimx/sb900/late.c
+++ b/src/southbridge/amd/cimx/sb900/late.c
@@ -45,7 +45,7 @@ static AMDSBCFG *sb_config = &sb_late_cfg;
* @param[in] config Southbridge configuration structure pointer.
*
*/
-u32 sb900_callout_entry(u32 func, u32 data, void* config)
+u32 sb900_callout_entry(u32 func, u32 data, void *config)
{
u32 ret = 0;