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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-04 13:26:11 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-11 07:18:02 +0200 |
| commit | bc90e15d3f8e841ccf229fca5d7df99436ff4bdb (patch) | |
| tree | bbbd4f2904b42d201d7e2fbccea5bfcbeeeed166 /src/southbridge/amd/cimx | |
| parent | c04afd6433cd53acdc727ad760cde9c40090030b (diff) | |
CBMEM: Backup top_of_ram instead of cbmem_toc
AMD northbridges have a complex way to resolve top_of_ram.
Once it is resolved, it is stored in NVRAM to be used on resume.
TODO: Redesign these get_top_of_ram() functions from scratch.
Change-Id: I3cceb7e9b8b07620dacf138e99f98dc818c65341
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3557
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/amd/cimx')
| -rw-r--r-- | src/southbridge/amd/cimx/sb700/lpc.c | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/cfg.c | 12 |
2 files changed, 10 insertions, 6 deletions
diff --git a/src/southbridge/amd/cimx/sb700/lpc.c b/src/southbridge/amd/cimx/sb700/lpc.c index 826ac057c4..91d7d2fd51 100644 --- a/src/southbridge/amd/cimx/sb700/lpc.c +++ b/src/southbridge/amd/cimx/sb700/lpc.c @@ -27,9 +27,9 @@ #define BIOSRAM_INDEX 0xcd4 #define BIOSRAM_DATA 0xcd5 -void set_cbmem_toc(struct cbmem_entry *toc) +void backup_top_of_ram(uint64_t ramtop) { - u32 dword = (u32) toc; + u32 dword = (u32) ramtop; int nvram_pos = 0xfc, i; for (i = 0; i<4; i++) { outb(nvram_pos, BIOSRAM_INDEX); diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index 90ad5a9f62..852054883e 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -37,9 +37,9 @@ int acpi_get_sleep_type(void) #endif #ifndef __PRE_RAM__ -void set_cbmem_toc(struct cbmem_entry *toc) +void backup_top_of_ram(uint64_t ramtop) { - u32 dword = (u32) toc; + u32 dword = (u32) ramtop; int nvram_pos = 0xf8, i; /* temp */ printk(BIOS_DEBUG, "dword=%x\n", dword); for (i = 0; i<4; i++) { @@ -51,18 +51,22 @@ void set_cbmem_toc(struct cbmem_entry *toc) } #endif -struct cbmem_entry *get_cbmem_toc(void) +#if CONFIG_HAVE_ACPI_RESUME +unsigned long get_top_of_ram(void) { u32 xdata = 0; int xnvram_pos = 0xf8, xi; + if (acpi_get_sleep_type() != 3) + return 0; for (xi = 0; xi<4; xi++) { outb(xnvram_pos, BIOSRAM_INDEX); xdata &= ~(0xff << (xi * 8)); xdata |= inb(BIOSRAM_DATA) << (xi *8); xnvram_pos++; } - return (struct cbmem_entry *) xdata; + return (unsigned long) xdata; } +#endif /** * @brief South Bridge CIMx configuration |