aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/amd/cimx
diff options
context:
space:
mode:
authorMartin Roth <gaumless@gmail.com>2015-04-26 18:53:26 -0600
committerMartin Roth <gaumless@gmail.com>2015-04-28 21:14:56 +0200
commit595e7777e7282249b13c3d7f8a45178e76798690 (patch)
tree3f578e46e4ba70ab530e2173845423597d536bec /src/southbridge/amd/cimx
parent562d6f30a0745b3da4c61974f8ac1b529dac9d80 (diff)
Kconfig whitespace fixes
trivial whitespace fixes. Mostly changing leading spaces to tabs. Change-Id: I0bdfe2059b90725e64adfc0bdde785b4e406969d Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10000 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r--src/southbridge/amd/cimx/sb800/Kconfig18
-rw-r--r--src/southbridge/amd/cimx/sb900/Kconfig24
2 files changed, 21 insertions, 21 deletions
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index ac25e896f2..891a8e096f 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -27,8 +27,8 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
if SOUTHBRIDGE_AMD_CIMX_SB800
config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/cimx/sb800/bootblock.c"
+ string
+ default "southbridge/amd/cimx/sb800/bootblock.c"
config ENABLE_IDE_COMBINED_MODE
bool "Enable SATA IDE combined mode"
@@ -72,15 +72,15 @@ config SB800_SATA_RAID
endchoice
config SB800_SATA_MODE
- hex
+ hex
depends on (SB800_SATA_IDE || SB800_SATA_RAID || SB800_SATA_AHCI)
default "0x0" if SB800_SATA_IDE
default "0x1" if SB800_SATA_RAID
default "0x2" if SB800_SATA_AHCI
config SB_SUPERIO_HWM
- bool
- default n
+ bool
+ default n
if SB800_SATA_AHCI
config AHCI_ROM_ID
@@ -100,8 +100,8 @@ if SB800_SATA_RAID
config RAID_ROM_ID
string "RAID device PCI IDs"
default "1002,4393"
- help
- 1002,4392 for SATA NON-RAID5 module, 1002,4393 for SATA RAID5 mode
+ help
+ 1002,4392 for SATA NON-RAID5 module, 1002,4393 for SATA RAID5 mode
config RAID_ROM_FILE
string "RAID ROM path and filename"
@@ -109,8 +109,8 @@ config RAID_ROM_FILE
default "site-local/sb800/raid.bin"
config RAID_MISC_ROM_FILE
- string "RAID Misc ROM path and filename"
- default "site-local/sb800/misc.bin"
+ string "RAID Misc ROM path and filename"
+ default "site-local/sb800/misc.bin"
depends on SB800_SATA_RAID
config RAID_MISC_ROM_POSITION
diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig
index 3bef95a113..be94c69592 100644
--- a/src/southbridge/amd/cimx/sb900/Kconfig
+++ b/src/southbridge/amd/cimx/sb900/Kconfig
@@ -29,30 +29,30 @@ config SATA_CONTROLLER_MODE
hex
default 0x0
help
- 0x0 = Native IDE mode.
- 0x1 = RAID mode.
- 0x2 = AHCI mode.
- 0x3 = Legacy IDE mode.
- 0x4 = IDE->AHCI mode.
- 0x5 = AHCI mode as 7804 ID (AMD driver).
- 0x6 = IDE->AHCI mode as 7804 ID (AMD driver).
+ 0x0 = Native IDE mode.
+ 0x1 = RAID mode.
+ 0x2 = AHCI mode.
+ 0x3 = Legacy IDE mode.
+ 0x4 = IDE->AHCI mode.
+ 0x5 = AHCI mode as 7804 ID (AMD driver).
+ 0x6 = IDE->AHCI mode as 7804 ID (AMD driver).
config PCIB_ENABLE
bool
default n
help
- n = Disable PCI Bridge Device 14 Function 4.
- y = Enable PCI Bridge Device 14 Function 4.
+ n = Disable PCI Bridge Device 14 Function 4.
+ y = Enable PCI Bridge Device 14 Function 4.
config ACPI_SCI_IRQ
hex
default 0x9
help
- Set SCI IRQ to 9.
+ Set SCI IRQ to 9.
config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/cimx/sb900/bootblock.c"
+ string
+ default "southbridge/amd/cimx/sb900/bootblock.c"
endif #SOUTHBRIDGE_AMD_CIMX_SB900