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authorGabe Black <gabeblack@chromium.org>2013-04-10 14:34:57 -0700
committerGabe Black <gabeblack@chromium.org>2013-04-11 04:13:49 +0200
commit1a5c9cd33b6f08f80d574acaca611550ae596841 (patch)
tree9f3db34ea14f3a2394c2c3c6b6db2b8bb61319f1 /src/southbridge/amd/cimx
parentfe3b024a44451b2f11d497ba6e2715fa6d6539a7 (diff)
Snow: Set up the ChromeOS GPIOs as inputs during the ROM stage.
We need these to be inputs so they can be read when populating the coreboot tables. It seems like a good idea to do this early to ensure that the input gate capacitance has had a chance to charge, and if we decide to use actually use that information during the ROM stage to do earlier RW firmware selection. It is not guarded by a ChromeOS config variable because those lines are always intended to be input GPIOs, regardless of whether we're running ChromeOS or not. Change-Id: Id76008931b5081253737c6676980a1bdb476ac09 Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3067 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/amd/cimx')
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