coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)

This patch is a raw application of

 find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'

Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

5 files changed, 8 insertions, 8 deletions

diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
index b356bf98e6..04b8abcc67 100644
--- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
+++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
@@ -49,7 +49,7 @@ typedef union _PCI_ADDR {
 #endif
 #define FIXUP_PTR(ptr)  ptr
 
-#if IS_ENABLED(CONFIG_SB800_IMC_FWM)
+#if CONFIG(SB800_IMC_FWM)
 	#define IMC_ENABLE_OVER_WRITE        0x01
 #endif
 
diff --git a/src/southbridge/amd/cimx/sb800/bootblock.c b/src/southbridge/amd/cimx/sb800/bootblock.c
index dae8df8288..28b37c30f4 100644
--- a/src/southbridge/amd/cimx/sb800/bootblock.c
+++ b/src/southbridge/amd/cimx/sb800/bootblock.c
@@ -100,7 +100,7 @@ static void enable_clocks(void)
 	// change twice.
 	reg32 = *acpi_mmio;
 	reg32 &= ~((1 << 2) | (3 << 0)); // enable, 14 MHz (power up default)
-#if !IS_ENABLED(CONFIG_SUPERIO_WANTS_14MHZ_CLOCK)
+#if !CONFIG(SUPERIO_WANTS_14MHZ_CLOCK)
 	reg32 |= 2 << 0; // Device_CLK1_sel = 48 MHz
 #endif
 	*acpi_mmio = reg32;
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 38a2b76dec..1e1cfe0537 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -163,7 +163,7 @@ static struct device_operations lpc_ops = {
 	.read_resources = lpc_read_resources,
 	.set_resources = lpc_set_resources,
 	.enable_resources = pci_dev_enable_resources,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.write_acpi_tables = acpi_write_hpet,
 #endif
 	.init = lpc_init,
@@ -386,9 +386,9 @@ static void sb800_enable(struct device *dev)
 
 	case PCI_DEVFN(0x14, 3): /* 0:14:3 LPC */
 		/* Initialize the fans */
-#if IS_ENABLED(CONFIG_SB800_IMC_FAN_CONTROL)
+#if CONFIG(SB800_IMC_FAN_CONTROL)
 		init_sb800_IMC_fans(dev);
-#elif IS_ENABLED(CONFIG_SB800_MANUAL_FAN_CONTROL)
+#elif CONFIG(SB800_MANUAL_FAN_CONTROL)
 		init_sb800_MANUAL_fans(dev);
 #endif
 		break;
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index 90fe8f3697..d6eb1e22b7 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -135,7 +135,7 @@ static void ImcWakeup(void)
 
 int chipset_volatile_group_begin(const struct spi_flash *flash)
 {
-	if (!IS_ENABLED(CONFIG_SB800_IMC_FWM))
+	if (!CONFIG(SB800_IMC_FWM))
 		return 0;
 
 	ImcSleep();
@@ -144,7 +144,7 @@ int chipset_volatile_group_begin(const struct spi_flash *flash)
 
 int chipset_volatile_group_end(const struct spi_flash *flash)
 {
-	if (!IS_ENABLED(CONFIG_SB800_IMC_FWM))
+	if (!CONFIG(SB800_IMC_FWM))
 		return 0;
 
 	ImcWakeup();
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c
index e5366e97fc..fc321f8b6b 100644
--- a/src/southbridge/amd/cimx/sb900/late.c
+++ b/src/southbridge/amd/cimx/sb900/late.c
@@ -113,7 +113,7 @@ static struct device_operations lpc_ops = {
 	.set_resources = lpc_set_resources,
 	.enable_resources = lpc_enable_resources,
 	.init = lpc_init,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.write_acpi_tables = acpi_write_hpet,
 #endif
 	.scan_bus = scan_lpc_bus,